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using systemview to create Xilinx CoreGEN code

Question asked by SGARRI on Jul 26, 2006
Latest reply on Jul 31, 2006 by istirl
I'm interested in using SystemView to create DSP cores that work with a Xilinx FPGA.  Can this work with the Virtex 4?  The users manual shows it only working with the XC4000/Spartan series.