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Dynamic link: error during symbol generation

Question asked by MARTINE1212_eesof on Jul 3, 2008
I am using the dynamic link (cadence-ADS) my designs are fine under cadence but when I try to load the schematic/symbol under ADS the ICFB window shows the following:

IDF<MP>: Attempting to generate symbol from Cadence ...
*WARNING* Invalid cellId
*WARNING* ddGetObjLib: Was passed an Invalid Id ((nil)).
*WARNING* Invalid cellId
*WARNING* ddGetObjLib: Was passed an Invalid Id ((nil)).
*WARNING* IDF<DFII>: replaced double quotes with underlines for ADS in ((("cells" ("tsmcN65 nch" "tsmcN65 nch_25" "tsmcN65 nch_25_dnw" "tsmcN65 nch_25_dnw_mac" "tsmcN65 nch_25_dnw_macx" "tsmcN65 nch_25_dnwod33" "tsmcN65 nch_25_dnwod33_mac" "tsmcN65 nch_25_dnwod33_macx" "tsmcN65 nch_25_dnwod33x" "tsmcN65 nch_25_dnwud18" "tsmcN65 nch_25_dnwud18_mac" "tsmcN65 nch_25_dnwud18_macx" "tsmcN65 nch_25_dnwud18x" "tsmcN65 nch_25_dnwx" "tsmcN65 nch_25_mac" "tsmcN65 nch_25_macx" "tsmcN65 nch_25od33" "tsmcN65 nch_25od33_mac" "tsmcN65 nch_25od33_macx" "tsmcN65 nch_25od33x" "tsmcN65 nch_25ud18" "tsmcN65 nch_25ud18_mac" "tsmcN65 nch_25ud18_macx" "tsmcN65 nch_25ud18x" "tsmcN65 nch_25x" "tsmcN65 nch_33" "tsmcN65 nch_33_dnw" "tsmcN65 nch_33_dnw_mac" "tsmcN65 nch_33_dnw_macx" "tsmcN65 nch_33_dnwx" "tsmcN65 nch_33_mac" "tsmcN65 nch_33_macx" "tsmcN65 nch_33x" "tsmcN65 nch_dnw" "tsmcN65 nch_dnw_mac" "tsmcN65 nch_dnw_macx" "tsmcN65 nch_dnwx" "tsmcN65 nch_hvt" "tsmcN65 nch_hvt_dnw" "tsmcN65 nch_hvt_dnw_mac" "tsmcN65 nch_hvt_dnw_macx" "tsmcN65 nch_hvt_dnwx" "tsmcN65 nch_hvt_mac" "tsmcN65 nch_hvt_macx" "tsmcN65 nch_hvtx" "tsmcN65 nch_lvt" "tsmcN65 nch_lvt_dnw" "tsmcN65 nch_lvt_dnw_mac" "tsmcN65 nch_lvt_dnw_macx" "tsmcN65 nch_lvt_dnwx" "tsmcN65 nch_lvt_mac" "tsmcN65 nch_lvt_macx" "tsmcN65 nch_lvtx" "tsmcN65 nch_mac" "tsmcN65 nch_macx" "tsmcN65 nch_mlvt" "tsmcN65 nch_mlvt_dnw" "tsmcN65 nch_mlvt_dnw_mac" "tsmcN65 nch_mlvt_dnw_macx" "tsmcN65 nch_mlvt_dnwx" "tsmcN65 nch_mlvt_mac" "tsmcN65 nch_mlvt_macx" "tsmcN65 nch_mlvtx" "tsmcN65 nch_na" "tsmcN65 nch_na25" "tsmcN65 nch_na25_mac" "tsmcN65 nch_na25_macx" "tsmcN65 nch_na25x" "tsmcN65 nch_na33" "tsmcN65 nch_na33_mac" "tsmcN65 nch_na33_macx" "tsmcN65 nch_na33x" "tsmcN65 nch_na_mac" "tsmcN65 nch_na_macx" "tsmcN65 nch_nax" "tsmcN65 nchx" ) ) ("type" "nmos") ("lxActiveLayer" "OD drawing")  ("lxMOSDeviceType" "NMOS") ("lxDeviceWidth" "w") ("lxMaxWidth" 1e-05))  (("cells" ("tsmcN65 pch" "tsmcN65 pch_25" "tsmcN65 pch_25_mac" "tsmcN65 pch_25_macx" "tsmcN65 pch_25od33" "tsmcN65 pch_25od33_mac" "tsmcN65 pch_25od33_macx" "tsmcN65 pch_25od33x" "tsmcN65 pch_25ud18" "tsmcN65 pch_25ud18_mac" "tsmcN65 pch_25ud18_macx" "tsmcN65 pch_25ud18x" "tsmcN65 pch_25x" "tsmcN65 pch_33" "tsmcN65 pch_33_mac" "tsmcN65 pch_33_macx" "tsmcN65 pch_33x" "tsmcN65 pch_hvt" "tsmcN65 pch_hvt_mac" "tsmcN65 pch_hvt_macx" "tsmcN65 pch_hvtx" "tsmcN65 pch_lvt" "tsmcN65 pch_lvt_mac" "tsmcN65 pch_lvt_macx" "tsmcN65 pch_lvgn x" "tsmcN65 pch_mac" "tsmcN65 pch_macx" "tsmcN65 pch_mlvt" "tsmcN65 pch_mlvt_mac" "tsmcN65 pch_mlvt_macx" "tsmcN65 pch_mlvtx" "tsmcN65 pchx" ) ) ("type" "pmos") ("lxActiveLayer" "OD drawing")  ("lxMOSDeviceType" "PMOS") ("lxDeviceWidth" "w") ("lxMaxWidth" 1e-05))).
*ERROR* IDF<MP>: List of design parameter names too long

Is there any solution??
We need to use some of the 3D and transmission lines under ADS with our design in TSMC process...

The same problem occurs for all the cadence cells!!!!