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Physical extension of ports

Question asked by LI04124 on Jan 11, 2005
Latest reply on Jan 12, 2005 by ALEPEREZ
Hello everybody,

I´ve got the following problem:

I am designing multi-stage power amplifiers for UMTS (2.14GHz) and therefore I´m using em-cosimulation for characterization of the interconnects and matching networks to get more realistic simulation results. As the flanges of my final stage transistor are ~15mm wide I need pads with a width of about 18mm.
Within my simulation I use 1 port (centered and on the edge of the pad) to connect the drain of the final stage transistor with its pad and output matching network. As I don´t measure the simulated output power (measurement is ~3dB below simulation ) I ask myself if it´s correct to simulate a transistor output with a physical extension of about 15mm with a single port. ???
The simulation results are quite independent of the used mesh density but very sensitive to the positioning of the port. For example, by placing the port a bit more (1...2mm) into the pad I get a variation of output power of about 8dB. :o

So my question is: Has anybody experience with modeling such wide pads or rather injecting energy into a circuit by using a physically extended source? Are there perhaps tricks with the meshing I can do?

Hope someone can help me!

Greetings!!!

Thomas  

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