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Simulating RF Via

Question asked by aprocc on Jul 12, 2006
Latest reply on Jul 19, 2006 by JERRY_MARKETOS
Hi All,

Does anyone know if genesys 2003.03 can model a through board via (6 layers) that makes a connection to a stripline on layer two?

Hints on how to proceed would be helpful. I'm considering using a stripline to improve isolation on a cascaded amplifier and would like to use a'controlled impedance via'.  Before glassing the board I definitely want to do some simulation.

Ap   
Stackup

1. Top (Flooded)
2. RF Stripline
3. Ground Plane
4. Power Plane
5. TBD (maybe control lines)
6. TBD (Flooded)  

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