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Xilinx FPGA dynamic probe test bank and clock bank question

Question asked by Souhaibe_Forums on Apr 11, 2008
Latest reply on Apr 11, 2008 by Souhaibe_Forums
I have a Virtex 2 FPGA, using dynamic probe (B4655A), I am wondering how does the test bank work and can I use a different clock on each bank or do I need a clock with each bank?  

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