Yes. For example the first LAI core with 16 output pins could be mapped to the outside of a mictor connector with its corresponding clock. A second core with five output pins could be mapped to the even side of the same mictor connector. A separate logic analysis module is required to collect acquisition data for each core.
core with five output pins could be mapped to the even side of the same mictor connector. A separate logic analysis module is required to collect
acquisition data for each core.