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Verilog-A: How can I give variables as parameter to a module

Question asked by iafmember on Oct 18, 2011

how can I give variables as parameter to a Verilog-A module?

I wrote the module Resistor in Verilog-A with parameter Noise and value of resistance.

module Resistor(p,n);
  electrical p,n;
  parameter real R=1.0 from [0:inf];
  parameter integer Noise = 1 from [0:1];

I can pass numbers direktly as parameter:
Resistor #(.R(4))     r_gate(G, g);

But I can't pass any calculated value or a value which is a parameter or variable.

I would like to pass the Variable "R_g", which will be calculated in following sample:


I'm becoming the following error message from Agilent ADS:
"Invalid (non-static) initialization for parameter R"

Sometimes ADS gives non error message but the result of the DC-simulation are not practicable.

How I solve this problem?

Thanks a lot!