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Lay-out

Question asked by Sam1990 on Oct 14, 2011
Latest reply on Mar 11, 2012 by GIRI
I am designing a LNA. Therefore I have designed a PCB-layout and created a component to place it in schematics.

When I annotate the DC-solution, something strange is happening. In a node, the incoming currents are different from the outgoing currents( eg in every node I lose about 30 micro ampere). This isn't a big current but it is 30 percent from the incoming current.

Does someone know the reason for 'losing' a bit current?  

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