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DC convergence issue in AC simulation

Question asked by labitt on Mar 1, 2006
Latest reply on Mar 6, 2006 by wrivas
Trying to run the file SYN_FQ_A3P to generate component values for a WB PLL.  This works ok with an ideal amplifier.  When I substitute a real amplifier, characterized by a SPICE file, I get the message "Error detected by hpeesofsim during DC analysis 'AC3'.  No DC convergence.  Please contact EESof Technical Support."  The spice file was imported from http://www.analog.com/Analog_Root/stati ... ad8057.cir
I increased the Imax value for both of the active device models per one of the technotes on this site.  This did not prevent the convergence error. I noticed that the subcircuit has some grounds in it, however, the grounds are not brought out to the interface.  It was my understanding that this is not a recommended SPICE construct.  Should I use nodesets on the capacitors to get convergence?  Or is there someother recommended technique.  For what it is worth, the circuit simulates in spice only if the common of the bipolar power supplies are not grounded.  

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