Hello,
For the clock PLL, I want to test the Time Interval Error (TIE) with EZJIT.
The question on setting the “Nominal data rate†in the 1st or 2nd order PLL, due to their clock frequency value maybe unstable or drift from my known frequency.
I don’t know the exactly clock frequency, and also afraid the result is wrong due to their wrong frequency setting.
Such the nominal data rate is 500MHz, if the set to 499.9M, our scope can recovery the data and show the TIE values through EZJIT.
But if set to 499.0 MHz, the scope couldn’t recover it.
In the clock recovery, only the “Constant Frequency†can set frequency to auto.
But for first-Order or second-order PLL, I need to set the frequency myself.
Most of the time, I didn’t know the exactly frequency to set. But the loop bandwidth setting is my key factor setting.
So my suggestion is 1) Add “Auto†Nominal data rate for setting in both 1st and 2nd order PLL mode.
Is it possible to add this function?
For the clock PLL, I want to test the Time Interval Error (TIE) with EZJIT.
The question on setting the “Nominal data rate†in the 1st or 2nd order PLL, due to their clock frequency value maybe unstable or drift from my known frequency.
I don’t know the exactly clock frequency, and also afraid the result is wrong due to their wrong frequency setting.
Such the nominal data rate is 500MHz, if the set to 499.9M, our scope can recovery the data and show the TIE values through EZJIT.
But if set to 499.0 MHz, the scope couldn’t recover it.
In the clock recovery, only the “Constant Frequency†can set frequency to auto.
But for first-Order or second-order PLL, I need to set the frequency myself.
Most of the time, I didn’t know the exactly frequency to set. But the loop bandwidth setting is my key factor setting.
So my suggestion is 1) Add “Auto†Nominal data rate for setting in both 1st and 2nd order PLL mode.
Is it possible to add this function?
Please don't place so much emphasis on the nominal data rate setting. It is only there as a guideline and most the time the software does not need or use this setting at all. During clock recovery the algorithm recovers the clock using the specified method and figures out the data rate by identifying the smallest bit. In some extreme situations that we have seen, the jitter is so large on the signal that the smallest bit might look smaller to the algorithm than it should. In pll clock recovery, the nominal data rate works like the constant frequency semi-automatic setting. The nominal data rate entered is only used as a guideline