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Characterization of a THRU standard

Question asked by bejstam on Nov 10, 2011
Latest reply on Nov 10, 2011 by Dr_joel
We have designed an in-fixture cal kit using a simple PCB design. A local Agilent field engineer has helped me get started, and he thought that at relatively low frequencies (< 3 GHz) the inductive terms of the SOL standards could be neglected.

I have made an estimate of the delay in the delay in the SOL standards, equal due to identical PCB layout.

For the THRU standard, I can get a delay estimate from the PNA-X guided SOLT cal when my cal kit definition excludes the THRU standard. How should I setup the PNA-X in order to get the most accurate estimate of this THRU delay (numer of points, frequency range averaging etc.)?