I am simulating a Power amplifier design and my input is an envelope modulated signal with a sampling frequency 92.16 MHz. while using envelope simulation the "TIme Step too small" error is coming. And it is taking too much time to simulation if i reduce the sampling frequency to 92.16 * 10^4 Hz.
How i can solve this problem. Is there any other method to do fast envelope simulation for RF power amplifier.
There are a number of steps one can take to address Envelope convergence issues. First of all the "time step too small" error is not necessarily literally true. Sometimes convergence can be attained by either increasing or decreasing the time step, typically in multiples of 2. The time step is inversely proportional to the simulation bandwidth, so make sure the time step is small enough to capture the bandwidth.
Another tip that can sometimes be helpful is to decrease the input power to a level that results in linear behavior. Sweeping the input power can also be helpful, as the solution for the previous step will be used for the current step.
If you haven't already done this, suggest characterizing the performance with Harmonic Balance and a CW input signal. As you probably know, Envelope is just HB which supports a time varying envelope.,