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CMOS RFIC substrate ground

Question asked by engrvip on Sep 12, 2017
Latest reply on Sep 13, 2017 by volker_muehlhaus



I want to simulate a RFIC inductor layout in CMOS technology. During EM simulation which layer will be used as a GROUND, since in RFIC several metal layers and substrate itself can be assigned a ground?


I have seen some places where infinite ground is defined at bottom of substrate ? What kind of applications determine this approach of assigning ground at bottom of substrate ?