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Repeatability Gating Technique Question

Question asked by VNA123 on Oct 15, 2015
Latest reply on Oct 15, 2015 by Dr_joel
Dr. Joel,

In the first section of chapter 9 of your book, you go into detail about PCB fixture characterization. You mention the technique of gating the connectors of all the standards to see the repeatability of the connectors by calculating the Vector Difference of them. In that discussion, you mention that it is a good idea to have a measurement of 4x the operating frequency of interest. Why is this? 

Edit: Forgot to mention. You mention putting the center of the gate around the connector with a span set to where the gate stop is around the center of the thru. The 100ps Center with 1040ps span example is what I'm talking about. I don't have timedomain gating on the VNA. I rely on PLTS for this and typically the start of all my time domain profiles from sparameters is roughly around 200ps. This may be completely point question, but it mathematically sounds to me that the technique is limited (that is the gate span) when using PLTS. Is there any real problem here? I've been practicing and I've typically have just been looking at impulse responses and set the gate to a point after the connector where the impulse dies to 0 (roughly a little bit after the connector). Hope this makes sense.

Update Edit: Feel kind of silly now. Looked at the pictures and you can clearly see the start and stop points of the gate. I definitely don't see see gate span being 1040ps.


Edited by: KTB on Oct 15, 2015 9:26 AM

Edited by: KTB on Oct 15, 2015 9:42 AM