Hi, I am designing a power amplifier on the pcb board.
I want to see the impedance of the bias part(RF choke to the DC input terminal).
I've compared the results of schematic and em-cosimulation,
Layout.png
schematic.png
But the two results are quite different.(red is for em-cosimulation and blue is for schematic)
result2.png
You can see there is a knot on the red curve, and I am wondering if my em setup is right...
Here is the result of em simulation result(only for layout not em-cosimulation),and it looks strange...
result.png
Does anyone have any idea??
Thanks~
I want to see the impedance of the bias part(RF choke to the DC input terminal).
I've compared the results of schematic and em-cosimulation,
Layout.png
schematic.png
But the two results are quite different.(red is for em-cosimulation and blue is for schematic)
result2.png
You can see there is a knot on the red curve, and I am wondering if my em setup is right...
Here is the result of em simulation result(only for layout not em-cosimulation),and it looks strange...
result.png
Does anyone have any idea??
Thanks~
Check results after placing vias that connect the different grounds.