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Re: Generate Data and clock from Agilent 16720A - branched

Question asked by incisive on Dec 4, 2014
Latest reply on Dec 17, 2014 by algoss
I have used data POD 3.3 V and clock POD 3.3 V for the generation of data stream and internal clock of 60 MHz through Pattern generator of Agilent Logic Analyzer. The PODs are then connected to FPGA and output PODS of Logic Analyzer show whether the data is generated or not. The problem no data is being generated on FPGA. When I checked the signals on Input pins of FPGA through oscilloscope, the pattern is generated but the pk-to-pk voltage is in mV. As I change the PODs to 2.5 V and 1.8 V, the signal voltage level deteriorates. Can you help me determine what is the problem? Do I have to set any threshold on Pattern generation? How and where to do that? What am I missing?