Hi
I am using DDR3 (Discrete 64-bit with ECC) at 1200Mb/S Data rate. As this is not a standard rate what are all the precautions and settings to be done before proceeding the automated test at 1200Mb/S (Such as Mask file, derate table file etc). Here with I have attached the test result that I got with the 1200Mb/S run. Some of the tests were failing. I am going through "U7231B_DDR3_Compliance_App_Testing_Notes.pdf" to trace the route cause. Especially on tWPRE, VIH.DQ(AC), VIH.DQ(DC), VOHdiff(AC) and VOLdiff(AC).
Some time the instrument says "unable to find valid read burst" / "unable to find valid write burst". How can I mitigate those.
It would be helpful if some one direct me on the right path.
Regards,
Kiruba
Edited by: kiruba on Apr 4, 2014 9:26 AM
Edited by: kiruba on Apr 6, 2014 11:19 PM
I am using DDR3 (Discrete 64-bit with ECC) at 1200Mb/S Data rate. As this is not a standard rate what are all the precautions and settings to be done before proceeding the automated test at 1200Mb/S (Such as Mask file, derate table file etc). Here with I have attached the test result that I got with the 1200Mb/S run. Some of the tests were failing. I am going through "U7231B_DDR3_Compliance_App_Testing_Notes.pdf" to trace the route cause. Especially on tWPRE, VIH.DQ(AC), VIH.DQ(DC), VOHdiff(AC) and VOLdiff(AC).
Some time the instrument says "unable to find valid read burst" / "unable to find valid write burst". How can I mitigate those.
It would be helpful if some one direct me on the right path.
Regards,
Kiruba
Edited by: kiruba on Apr 4, 2014 9:26 AM
Edited by: kiruba on Apr 6, 2014 11:19 PM
Before you use any Compliance App, you need to take some time to look at your signals to see if they are reasonable. Have you probed in a good place? The JEDEC spec says to probe at the ***** of the BGA. That's generally not possible, but vias are good. The W3630 series of interposers are good.
Are you doing read/write/read/write cycles? The SW expects to see a read burst and a write burst in a 10 usec period. Standard bursts of 8 with changing random data are the best. Most of the failures are from lack of valid bursts.
For tDQSH, the signal looks like a reflection at the end of a burst. Which is it? Use InfiniiScan to separate reads from writes, and look at the ends of bursts. Are they all like that?
The Eye measurements are advisory only, but it looks like the SW is having trouble figuring out what's good data and what's not. Try again with the newer SW.
Yes, you need to derate many of the limits, and possibly build a new mask, if you are not using a standard speed. It's possible that one of the standard speeds will work, or at least work well enough for you.
Remember that the real test for compliance is good data. Are you running a rigorous memory test program with lots of different patterns? Are you seeing any failures?
Al
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