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Run Verilog-AMS in GoldenGate

Question asked by JasonChen Employee on Dec 25, 2012
GoldenGate supports modeling in Verilog-AMS by co-simulating with a supported digital simulator. The Verilog-AMS Hardware Description Language (HDL) provides a way to describe analog, digital, and mixed signal aspects of a circuit. The language supports the use of both digital and analog simulators and handles the mixed signal interaction between the simulators and modules. The language is hierarchical and thus supports the top-down design of systems.

GoldenGate will automatically detect the use of Verilog-AMS code and will transparently manage the digital co-simulation process via configuration settings.