Logic and Protocol Analyzers
to create and rate content, and to follow, bookmark, and share content with other members.
FPGA performance with ATC2 inserted
Question asked by
on Apr 2, 2008
on Apr 2, 2008 by Souhaibe_Forums
Show 0 Likes
I am worried if I implement and ATC2 core into my design, my Xilinx FPGA performance will go down, is this true?
No one else has this question
Mark as assumed answered
This content has been marked as final.
Show 1 comment
(Required, will not be published)
Apr 2, 2008 1:31 PM
The core will have some effect on performance, but it should not be significant. The effect on performance is directly related to timing constraints. The timing core is capable of running at the fastest internal FPGA speed of the device you are using. For the timing core, the sample rate on the logic analyzer will determine how often data is captured. For state cores, the maximum sample rate will be the lower of the speed of the FPGA time domain being measured or the maximum state speed of the logic analyzer. All supported logic analyzers have state speeds of 200 MHz and greater.
Show 0 Likes
Retrieving data ...
SystemVue tool crash
Optimizing RF PA EM Model
Is there any method to control ADS simulation from python?
How to import an input source into ADS