Hi,

In some calibration standards the cal kits have negative inductance coefficients. It is not hard to understand if it is only some parts of coefficient set, like L1, L2 etc, in the short stand. However, for some on-wafer calibration standard, there is only one negative inductance is placed in front of, let's say, LOAD standard. At this point, things become strange, for these reason in my point of view:

1. Normally a series inductor or a shunt capacitor can be seen as a piece of transmission line, with infinite/0 characteristic impedance respectively. However, an inductor with negative value, should we consider it as a series negative inductor, or a shunt positive capacitor?

2. This inductor/capacitor translation only works at some specific frequency. At which frequency should we perform such a translation?

In real application, if a negative inductance is considered as the coefficient of a LOAD standard, is it correct to translate it to a negative delay time? Otherwise, I could only consider translate it to a positive value, but different at different frequency, which is implying a dispersive effect.

I am not sure what is the best practice here and it seems there is some problem with our calibration. So I would like to make the fundamental theory here clearer. Thanks in advance for any reply!

Regards,

NL

In some calibration standards the cal kits have negative inductance coefficients. It is not hard to understand if it is only some parts of coefficient set, like L1, L2 etc, in the short stand. However, for some on-wafer calibration standard, there is only one negative inductance is placed in front of, let's say, LOAD standard. At this point, things become strange, for these reason in my point of view:

1. Normally a series inductor or a shunt capacitor can be seen as a piece of transmission line, with infinite/0 characteristic impedance respectively. However, an inductor with negative value, should we consider it as a series negative inductor, or a shunt positive capacitor?

2. This inductor/capacitor translation only works at some specific frequency. At which frequency should we perform such a translation?

In real application, if a negative inductance is considered as the coefficient of a LOAD standard, is it correct to translate it to a negative delay time? Otherwise, I could only consider translate it to a positive value, but different at different frequency, which is implying a dispersive effect.

I am not sure what is the best practice here and it seems there is some problem with our calibration. So I would like to make the fundamental theory here clearer. Thanks in advance for any reply!

Regards,

NL

Let me clarify a little bit. The VNA we have is a 8720ES, which does not have non-linear inductance model more SHORT standard. I have already asked some questions at this forum. Basically our solution, as suggested here, is to compute a new offset delay/offset loss value to account for the inductance term.

Now the problem we are facing is to compute an on-wafer cal-kit coefficients. For the LOAD standard there is a series negative inductance value, which should be translated to a delay term so that we can input it into the VNA. What we are not sure is how we could make an equivalent transmission line for the negative inductance. Such a TL may be dispersive in my point of view...

Regards,

Nan

Make the offset Zo of the offset line >> the resistor value. If the resistor is 50 ohms, make offset Zo >500 ohms

then calculator offset delay = L/(offset Zo). Negative inductance = negative delay. Offset loss should be zero.

The fix load or arbitrary impedance set up allow you to define the offsets that way. For a fixed load the termination is assued to be 50 ohms or system impedance. For an arbitrary impdance, the termination can be defined as any real value.

Currently we are using negative values on a 8720ES series VNA. But someone suggests negative value is not usable on this old model and need to be translated to a positive value somehow. We are not sure how this can be done so I am asking for some advice here.

In a calibration substrate coefficient file, for the Load standard, there are three options to choose. It says 1.6fF or -4.0pH or 5 Ohm & 0.0081 ps. It seems that the -4.0pH is translated to 1.6fF somehow, and this 1.6fF is translated to 0.0081ps with 5 Ohm as characteristic impedance. I totally have no idea how this -4.0pH is related to this 1.6fF... Some further explanation is needed here.

Thanks!

Regards,

Nan

> {quote:title=linan0827 wrote:}{quote}

> So you mean a negative delay value is OK in the application?

>

> Currently we are using negative values on a 8720ES series VNA. But someone suggests negative value is not usable on this old model and need to be translated to a positive value somehow. We are not sure how this can be done so I am asking for some advice here.

There is nothing wrong in having a negative delay, even on that old model. I use an 8720D, which is even older than the 8720ES.

See this thread

Can one have a negative offset and capacitance for an "open" cal standard?

and in particular this comment from Dr. Joel Dunsmore of Agilent posted on January 1st, 2013 @ 10:54 PM.

+If you setup you standards (or test connector) to have some recession, and reference to the test pin, then you will reasonably have some negative offset.+

If I were you, I would forget about negative inductances, but use negative offset delays.

Dave