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	Author	Latest activity	Views
Link the IC-CAP Modeling Tool to External Simulators in EEsof EDA	rajsodhi	September 14, 2020 6:58:34 PM by rajsodhi	1056	Show 0 Likes0	Show 0 Bookmarks0	0 Replies0
How to Import and Export CSV Data in IC-CAP in EEsof EDA	rtinti	August 12, 2020 2:01:13 AM by rtinti	781	Show 1 Likes1	Show 0 Bookmarks0	1 Replies1
Solving Signal Integrity Issues with I²S Protocol Triggering and Decode Software in Oscilloscopes Blog	rachelbeddor	August 10, 2020 7:13:31 AM by rachelbeddor	1002	Show 1 Likes1	Show 0 Bookmarks0	2 Replies2
New Infiniium Software Release - 6.0 in Oscilloscopes Blog	melissakeysight	August 3, 2020 2:49:32 PM by melissakeysight	1168	Show 3 Likes3	Show 1 Bookmarks1	0 Replies0
What Time Synchronization Means for Your Multi-Channel RF Measurements in Better Measurements: The RF Test Blog	EricHsu	August 3, 2020 7:21:18 AM by EricHsu	877	Show 1 Likes1	Show 1 Bookmarks1	0 Replies0
Tim’s Blackboard #8: Eye-opening Experience with CTLE in EEsof EDA	Tim Wang Lee	March 5, 2020 10:07:51 AM by Tim Wang Lee	3267	Show 1 Likes1	Show 0 Bookmarks0	4 Replies4
How to Import and Simulate DC IV and S-parameters Pulsed Data with IC-CAP in EEsof EDA	rtinti	February 10, 2020 11:18:06 AM by rtinti	548	Show 1 Likes1	Show 2 Bookmarks2	0 Replies0
Journey to the Center of the Scope - How an Oscilloscope Works in Oscilloscopes Blog	ErinEast	September 7, 2019 7:02:46 AM by ErinEast	24626	Show 4 Likes4	Show 0 Bookmarks0	1 Replies1
Oscilloscope Triggering: When is Normal not so Normal? in Oscilloscopes Blog	JohnnieHancock	July 22, 2019 3:07:42 PM by JohnnieHancock	11845	Show 2 Likes2	Show 0 Bookmarks0	6 Replies6
5G Flexible Numerology – What is it? Why should you care? in Next Generation Wireless Communications	Sheri	July 22, 2019 1:27:56 AM by Sheri	22518	Show 3 Likes3	Show 0 Bookmarks0	7 Replies7
Creating Verilog-A Models in ADS from VHDL-A Code: Part 2 - "All-in-one" Testbench in EEsof EDA	Colin Warwick	June 20, 2019 8:24:41 AM by Colin Warwick	1195	Show 0 Likes0	Show 0 Bookmarks0	0 Replies0
The Tower of Babel and PSPICE/LTspice Import in EEsof EDA	Colin Warwick	April 12, 2019 7:32:37 AM by Colin Warwick	416	Show 0 Likes0	Show 0 Bookmarks0	0 Replies0
What is PathWave? in EEsof EDA	kaelly_farnham	February 11, 2019 1:51:04 PM by kaelly_farnham	1927	Show 0 Likes0	Show 0 Bookmarks0	0 Replies0
Design a Smaller, Lighter, and Lower Cost Switched-Mode Power Supply in EEsof EDA	Colin Warwick	January 18, 2019 11:05:54 AM by Colin Warwick	267	Show 0 Likes0	Show 0 Bookmarks0	0 Replies0
Creating Verilog-A Models in ADS from VHDL-A Code: Part 4 - Derivatives in EEsof EDA	Colin Warwick	January 14, 2019 7:01:52 AM by Colin Warwick	954	Show 0 Likes0	Show 0 Bookmarks0	0 Replies0
Creating Verilog-A Models in ADS from VHDL-A Code: Part 5 - Verification in EEsof EDA	Colin Warwick	January 11, 2019 11:09:10 AM by Colin Warwick	305	Show 0 Likes0	Show 0 Bookmarks0	0 Replies0
Creating Verilog-A Models in ADS from VHDL-A Code: Part 3 - Shared Library in EEsof EDA	Colin Warwick	January 8, 2019 2:04:42 PM by Colin Warwick	1028	Show 0 Likes0	Show 0 Bookmarks0	0 Replies0
Creating Verilog-A Models in ADS from VHDL-A Code: Part 1 - Simple Resistor in EEsof EDA	Colin Warwick	January 3, 2019 2:27:43 PM by Colin Warwick	1046	Show 2 Likes2	Show 0 Bookmarks0	0 Replies0
Computing the Derivative of I-V Data Using Python in IC-CAP in EEsof EDA	michea	December 17, 2018 6:24:08 PM by michea	1364	Show 1 Likes1	Show 0 Bookmarks0	0 Replies0
Partial Reconfiguration: the backbone of HVI in Digitizers Blog	jakedaly	November 7, 2018 6:55:42 AM by jakedaly	434	Show 0 Likes0	Show 1 Bookmarks1	0 Replies0