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What to Expect  From PCIe Gen5?

Blog Post created by stmichel Employee on Jun 29, 2018

What to expect from PCIe Gen5?

Ever heard of Cache coherent interconnect for accelerators (CCIX), GenZ, NVLink or OpenCAPI? If you haven’t, you soon will. These wave of technologies is currently pushing the incumbent PCIe to faster speeds. PCIe Gen4 is just becoming mainstream, but has limited bandwidth, given the needs of today’s technologies at only 16 Gbps. This is a far cry from today’s IEEE-led interconnect technologies that are now looking to data rates well above 100 Gbps. As a result, new technologies have appeared to speed up the interconnect space. These buses look to specialize in areas where PCIe is not as customized. For example, GenZ is targeting memory-to-CPU connections and moving to speeds above 30 Gbps. Another technology, NVLink is being developed to connect GPUs to GPUs. CCIX looks to replace PCIe at 25 Gbps.

This is where this whole revolution gets interesting. PCIe took over 5 years to develop the Gen4 technology at 16 Gbps, but rather than be satisfied with those speeds, it has announced PCIe Gen5 with speeds of 32 Gbps. So, in a matter of a year, we have seen server speeds go from 16 Gbps to over 30 Gbps, and the technologies are looking to PAM4 to push speeds above 50 Gbps. We have also moved from having one dominant technology to having competition in the technology space, which can lead to even further innovation.

Of course, the revolution does not happen without challenges. For PCIe Gen4, the standard eye height was specified at a mere 16 mV at the end of the channel (this is really small), even with all channel effects removed and equalization applied. Going to 32 Gbps does not help that problem, and for Gen5, the eye height drops to a miniscule 8 mV. Essentially, high-speed digital technologies are moving to a closed eye.

With Keysight’s PCI Express technology expert Rick Eads having been elected to the PCI-SIG Board of Directors this month, we’ll be the first to update you on the latest developments on PCIe Gen5…  and of course we’ll  provide you with the appropriate tool sets for the next testing challenges.

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