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What’s next with USB-CTM? Although Thunderbolt 3 is an optional/alternate mode today, you might have to implement it in the future

Blog Post created by jitlim Employee on Aug 16, 2017

In addition to USB, the Type-C connector allows implementation of Alternate technologies like DisplayPort, Thunderbolt, and HDMI.

 

A recent announcement from Intel will radically change future generations of Type-C implementations: https://newsroom.intel.com/editorials/envision-world-thunderbolt-3-everywhere/

 

We will focus on the 2 key points of this announcement and how it will affect you:

  • Thunderbolt Integrated CPU
  • Thunderbolt Open Spec

 

Some of the resistance for Thunderbolt 3 adoption included higher costs, proprietary technology, and severe signal integrity (SI) challenges at 20 Gbps. The Intel press release will ultimately remove the first 2 barriers to entry by reducing cost and removing the royalty fee. But it still does not change the SI challenges inherent in a high-speed 20Gbps link over passive cables.

 

To get a head-start on Thunderbolt 3 development, first step is to register to be a member and get the latest Specification and Compliance Test Specification (CTS) at:  https://thunderbolttechnology.net/

In addition to getting the Spec documents, membership allows you access to 3 Plugfests a year where you can register your product to be tested, plus get the latest updates on the technology.

 

Since the Spec is not currently publicly available, we want to view Thunderbolt 3 through the lens of: How to Transmit, Traverse a passive cable, and Receive at the other end a 20Gbps signal running over a 80Gbs port with crosstalk. That is essentially the challenge of implementing Thunderbolt 3.

 

The legacy Thunderbolt/Thunderbolt 2 technologies were fairly simple to test because they used an active cable with open eyes at the Transmitter and Receiver. Thunderbolt 3 incorporates a passive cable which makes testing significantly more complex.

 

Let us now look at the methodologies and testing required to successfully implement Thunderbolt 3.

 

Transmitter Equalization

Like PCIe Gen 3 and USB 3.1 Gen 2, Thunderbolt 3 requires TXEQ to compensate for a lossy channel. There is a table of Thunderbolt 3 TXEQ Presets that must first be characterized to ensure they are precisely outputting the correct Pre-Shoot and De-Emphasis for each specific Preset. Next step is to perform a Preset Calibration/Optimization where a specific Preset is chosen as the best Preset for your particular Transmitter implementation.

 

Receiver Equalization

There is a set of CTLE DC Gains that need to be applied to determine the optimal performance. After determining the optimal CTLE, an optimal DFE also has to be applied to determine the best RXEQ for your particular channel. Not optimizing this parameter will guarantee a failure when implementing the passive cable use case.

 

Legacy 10.3125 Gbps Compatibility

Thunderbolt 3 allows inter-operability with legacy Thunderbolt 2 products connected with an adapter cable. As a result, you will need to test at both the Thunderbolt 3 20.625 Gbps rate and also the Thunderbolt 2 10.3125 Gbps rate.

 

Type-C Operation

Thunderbolt 3 runs exclusively over the Type-C connector. Since the Type-C connector has a CC1 and CC2 side, you will need to test both the TX1/RX1 pairs as well as the TX2/RX pairs - 4 differential pairs in total. Depending on a single, dual, or quad(!) port implementation, you will also need to test additional Type-C ports.

 

TP1/ TP3EQ Test Points

The TP1 test use case relates to using a passive cable. The TP3EQ use case is when your customer uses a passive cable. If your implementation prevents direct access to TP1, you must de-embed the channel to TP1 due to significant signal loss at 20 Gbps. Similarly, you must implement or embed the compliant cable model when testing at TP3EQ for 10G or 20G use cases.

 

Signal Quality Tests

Many of the Thunderbolt 3 measurements at first glance may seem familiar – UI, SSC, Rise/Fall, Jitter, and Eye Diagram. However, the underlying methodology for specifics like SSC Phase Slew Rate, CDR Order, PLL Loop BW and Damping, CTLE, DFE, and Uncorrelated Jitter are very unique and detailed in the CTS.

 

Requirements for USB-PD and Other Technologies

As shown in Figure 1, Thunderbolt 3 provides power up to 100W. This is a capability associated with USB-PD. Thunderbolt 3 is an Alternate mode that runs over the USB Type-C connector. As a result, it must adhere to the rules and testing related to the USB Type-C and USB-PD specifications. Both these specs are available from the USB-IF at: www.usb.org.

 

Figure 1 also shows that Thunderbolt requires implementation of USB and DP. Testing specifics for USB are available from www.usb.org and DP details from www.vesa.org.

Thunderbolt 3

I hope this blog provides a brief introduction to preparing for your Thunderbolt 3 implementation. I will share more specific testing details once the Thunderbolt 3 Specification becomes public.

 

USB Type-C™ and USB-C™ are trademarks of USB Implementers Forum

ThunderboltTM are trademarks of Thunderbolt Technology Community

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