Yes, please keep reading… Keysight, a leader in wireless technologies offers complete solutions for technologies such as 5G test beds, over the air (OTA) and many other 5G wireless related technologies. However, Keysight is also looking forward to another revolution that is occurring on the high-speed digital side of the business as PCI Express or PCIe and DDR move their 5th generations.
Why is this Gen5 revolution happening? The same story that drives the need for 5G mobile, also drives the need for much faster intra-data center interconnect or intra-DCI (connections inside the data center), and inside of our servers. Virtual and augmented reality (VR/AR), autonomous cars, and high-definition (HD) streaming continue to push the need for more data, faster. Consumers no longer tolerate even the smallest delay, especially in VR/AR and autonomous driving. The end result is that new technologies are moving forward quickly in the data center.
The PCIe Gen5 Wave
Ever heard of Cache coherent interconnect for accelerators (CCIX), GenZ, NVLink or OpenCAPI? If you haven’t, you soon will. These wave of technologies is currently pushing the incumbent PCIe to faster speeds. PCIe Gen4 is just becoming mainstream, but has limited bandwidth, given the needs of today’s technologies at only 16 Gbps. This is a far cry from today’s IEEE-led interconnect technologies that are now looking to data rates well above 100 Gbps. As a result, new technologies have appeared to speed up the interconnect space. These buses look to specialize in areas where PCIe is not as customized. For example, GenZ is targeting memory-to-CPU connections and moving to speeds above 30 Gbps. Another technology, NVLink is being developed to connect GPUs to GPUs. CCIX looks to replace PCIe at 25 Gbps.
This is where this whole revolution gets interesting. PCIe took over 5 years to develop the Gen4 technology at 16 Gbps, but rather than be satisfied with those speeds, it has announced PCIe Gen5 with speeds of 32 Gbps. So, in a matter of a year, we have seen server speeds go from 16 Gbps to over 30 Gbps, and the technologies are looking to PAM-4 to push speeds above 50 Gbps. We have also moved from having one dominant technology to having competition in the technology space, which can lead to even further innovation.
Of course, the revolution does not happen without challenges. For PCIe Gen4, the standard eye height was specified at a mere 16 mV at the end of the channel (this is really small), even with all channel effects removed and equalization applied. Going to 32 Gbps does not help that problem, and for Gen5, the eye height drops to a miniscule 8 mV. Essentially, high-speed digital technologies are moving to a closed eye. Keysight has numerous tools to help test all these standards.
The Rise of DDR5
The other revolution is occurring on the memory side with DDR. For the last number of years, there has been discussion of a memory wall. What is a memory wall? The theory of the memory wall is that at some point, the dynamic random-access memory (DRAM) would be unable to keep up with the PC power, and a new memory technology would need to be developed. We now have moved into 2018, and yet DRAM remains viable and the “memory wall” has not happened – hence, the introduction of the new DDR5 technology. DDR5 represents the possibility of going beyond 5 GT/s for the first time. It also introduces a new challenge as DDR5 developers will need to test both the transmitter and the receiver. Previous DDR technologies only required transmitter testing.
Here are a couple of questions to consider: Why the need for a new DRAM technology (DDR5) when other, “better” technologies such as 3D silicon are coming to revolutionize the memory market? Does this mean there is no memory wall? First, new technologies are being developed on a continual basis for memory. If a new technology goes mainstream, it can become a billion-dollar business almost overnight. We see announcements around 3D silicon, magnetic memory, hybrid memory cube, and other high bandwidth memories all the time. The problem is that shipping them in volume is still too expensive for what consumers are willing to pay. Until costs get comparable to DRAM, DRAM will remain king and the industry continues to push DRAM further and further. As for the memory wall, it still absolutely will happen, it is just a matter of when. Maybe it is after DDR6, or maybe we will get to DDR10, but at some point, the memory industry will have to find a new technology to get to ultra-fast speeds. It will be interesting to watch.
I look back at 2010-2012 as great technology years, as Universal Serial Bus (USB) went to USB 3.0, PCI Express went to Gen3 and DDR began movement into DDR3. The result was much excitement for high-speed digital technologies and significant growth in the industry, especially coming out of the economic downturn. When you look at the technologies that are coming, you see a similar pattern happening from 2018-2020. It is a great time to watch as a new revolution is occurring, the Gen5 revolution – and not just in wireless.
In the meantime, watch our industry experts discuss the latest updates on PCI Express 5.0 and DDR5, as part of our DesignCon 2018 Keysight Education Forum (KEF) offers. I’m also interested to hear from you, technology watchers, on the Gen5 revolution. Feel free to comment below.