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jakedaly
Until recent years, synthesis of FPGA images was binary (no pun intended): reconfiguration was an all or nothing sort of thing. If you wanted to change something about your design—even something as simple as adding a register—you had to rebuild the entire image. This was time consuming, inefficient, and above all frustrating for engineers who… (Show more)
in Digitizers Blog
FrankC
In an earlier blog we looked at maximum acquisition time for a single record. This blog looks at the relationship between sample rate, record size, and memory size in multi-record acquisition mode. It’s split into several sections: Maximum acquisition time Maximum number of records Fully utilizing available memory Calculating required memory… (Show more)
in Digitizers Blog
jakedaly
  HVI: Time deterministic co-design of real-time software and virtual instrumentation   Anyone who has worked with FPGAs and virtual instrumentation—even the most experienced system architects and integrators—knows that unlocking the power that lies behind each is no easy task. For complex, multilayered measurement systems that employ both FPGA… (Show more)
in Digitizers Blog