Skip navigationLog in to follow, share, and participate in this community. Until recent years, synthesis of FPGA images was binary (no pun intended): reconfiguration was an all or nothing sort of thing. If you wanted to change something about your design—even something as simple as adding a register—you had to rebuild the entire image. This was time consuming, inefficient, and above all frustrating for engineers who… (Show moreShow less) In an earlier blog we looked at maximum acquisition time for a single record. This blog looks at the relationship between sample rate, record size, and memory size in multi-record acquisition mode. It’s split into several sections: Maximum acquisition time Maximum number of records Fully utilizing available memory Calculating required memory… (Show moreShow less) 
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