Skip navigationLog in to follow, share, and participate in this community. Until recent years, synthesis of FPGA images was binary (no pun intended): reconfiguration was an all or nothing sort of thing. If you wanted to change something about your design—even something as simple as adding a register—you had to rebuild the entire image. This was time consuming, inefficient, and above all frustrating for engineers who… (Show moreShow less) In an earlier blog we looked at maximum acquisition time for a single record. This blog looks at the relationship between sample rate, record size, and memory size in multi-record acquisition mode. It’s split into several sections: Maximum acquisition time Maximum number of records Fully utilizing available memory Calculating required memory… (Show moreShow less) HVI: Time deterministic co-design of real-time software and virtual instrumentation Anyone who has worked with FPGAs and virtual instrumentation—even the most experienced system architects and integrators—knows that unlocking the power that lies behind each is no easy task. For complex, multilayered measurement systems that employ both FPGA… (Show moreShow less) So how do I calculate the maximum single record acquisition time for my digitizer? There are some obvious factors, such as acquisition memory size, sample rate, and the number of bytes (or bits) per sample. However, some other factors aren’t so obvious, such as the effect of using an external clock, using DGT mode with binary decimation, or… (Show moreShow less) 
Digitizer, Oscilloscope… To-may-to, To-mah-to, right? Yes, at basic level, digitizers and oscilloscopes are very similar. They both convert analog signals to a digitized signal using an ADC (analog-to-digital converter). However, they have very distinguishing characteristics that are driven by the use-case or applications they address. Let’s… (Show moreShow less)
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