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6 Posts authored by: AlyssaRao Employee

Field Programmable Gate Array (FPGA) prototyping is already known to be a standard technique to verify the functionality and performance of ASICs, ASSPs, and SoCs. It is increasing in popularity today due to increasingly complex systems, especially in FPGA-based communications and radar systems.

We already know the benefits of FPGA prototyping: higher performance, portability, and availability (because of relatively lower cost). Using FPGA prototyping inside a complete design flow has even more benefits and enables FPGA-based communications and radar systems to be designed, verified and implemented even faster. FPGA application developers can more quickly validate communications digital signal processing (DSP) algorithms and accelerate physical layer (PHY) performance measurement, such as bit-error-rate (BER).Let’s look at an example of how a design flow can reduce respins in FPGA prototyping.

Our example is a military communication receiver inside a model-based design approach to a software-defined radio (SDR) flow that moves from system-level architecture to hardware verification.

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The above conceptual diagram breaks the FPGA prototyping design flow into 8 steps. It shows a design flow with SystemVue and a model-based verification flow. The process uses standard SystemVue libraries in both floating and fixed point for design and verification, along with FPGA implementation tools from Xilinx and Aldec. In this design flow the testing, I/O functions and some timing synchronization algorithms are also included.

SDR FPGA Design to Verification Flow in 8 Steps:

  1. System design & validation in floating point
  2. System design & validation in fixed point
  3. HDL code generation
  4. HDL validation using co-simulation with Aldec Riviera-PRO
  5. Generation of the FPGA programming file
  6. Loading of the.bit file into the FPGA
  7. Generation of test signals for FPGA receiver test
  8. Testing of the FPGA

 

The details of these 8 steps are outlined in the application note, FPGA Prototyping Using Keysight SystemVue, but we will highlight a few key points in this blog post. The app note walks through all 8 steps, showing screenshots of the Keysight SystemVue Electronic System Level (ESL) design software throughout. Keysight SystemVue provides an easy graphic programming environment to simulate and verify system performance prior to realizing a dedicated hardware implementation.

Using these 8 steps designers can reduce respins in FPGA prototyping.

The first step in this flow is the design process to create a working model that can be used to validate the receiver algorithms, first under ideal conditions, and then under a variety of stressful conditions (e.g., impairments and noise). This initial architectural and algorithmic modeling can be done using floating-point models in any of several formats: built-in graphical blocks, C++ or math language (.m).

The floating-point design for the Frequency Shift-Keying (FSK) system, including transmitter, communications channel and receiver is below.

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Connecting to test improves the fidelity of system architecture design. Conversely, leveraging the design platform for early R&D validation creates new value for test. Simulation is used to validate the overall FSK system. Using internal SystemVue graphs or external 89600 VSA software, the transmitter output is first verified to ensure the time waveform and frequency spectrum are acceptable.

The next step on the path to a hardware implementation is to consider the effects of quantization and finite-precision arithmetic on the algorithms. Will they still work? How much precision is required for the specified system performance?

In our example, SystemVue’s fixed-point library is used to consider these questions. The W1717 Hardware Design Kit is a SystemVue design personality that not only includes the fixed-point library and its diagnostic simulation support, but also VHDL/Verilog code-generation. Below is the fixed-point design for the FSK receiver.

FSK-System-with-Fixed-Point.jpg

The next steps in this example are hardware implementation of the baseband receiver and BER tester. In the final step the FPGA performance is tested. First, we verify the input FSK signal by connecting a signal generator’s RF output to a RF signal analyzer, and we observe the FSK signal.

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With this setup, we see the test and reference bits are aligned, and the expected numbers of errors are observed. Success! To see all the steps in more detail, I recommend reading the application note, FPGA Prototyping Using Keysight SystemVue.

Imagine how much faster FPGA-based validation would be with a system-level simulation tool integrated into the hardware design flow, for leading edge wireless and radar systems. Keysight SystemVue provides an easy graphic programming environment to simulate and verify system performance prior to realizing a dedicated hardware implementation. Although hand-coded VHDL can be quite powerful, from a project perspective it is more efficient to use HDL code-generation from the system level in a model-based design flow, reducing development and verification time.

Although we referenced specific applications and hardware platforms, the design flow for FPGA prototyping can apply to a variety of platforms and vendors. By going through this example we can see how a FPGA prototyping design flow helps simplify the design of complex systems, reducing respins, and helping to cut costs.

For more information about this specific application with SystemVue, please visit the following: http://edadocs.software.keysight.com/display/eesofapps/FPGA+Prototyping+Using+SystemVue

Check out more application examples in the ESL Application Center!

Apply for a FREE trial of SystemVue now!

If you missed our webcast on February 5, be glad. You would have been standing. Okay, just kidding, it was an online webcast, but we had a record number of people on the line clamoring for their question to be answered during the Q&A session. You missed out.

 

The good news is that the recorded version and slides are now available here. So grab a cup of coffee, take a seat, and learn about what is currently being done in 5G research at the physical layer.

 

For those who just want the highlights, keep reading. In this post and the next two, I’m going to cover the highlights from that webcast.

 

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If you missed it live, click the picture to watch the on-demand version.

Researching Waveform Techniques for 5G

Today I’d like to highlight the most interesting part (I believe) of 5G research today, waveform techniques.  The webcast covered 3 waveforms:

  1. Orthogonal Frequency Division Multiplexing (OFDM)
  2. Filter Bank Multicarrier (FBMC)/Generalized Frequency Division Multiplexing (GFDM)
  3. Universal Filtered Multicarrier (UFMC)

 

Designers are currently investigating which waveform would meet all of the requirements that 5G would demand. This includes such considerations as: efficiently supporting high density users, optimizing multiple accesses, efficient use of spectrum, robustness to narrow-band jammers and impulses, and many others. The webcast covered the advantages and disadvantages of each waveform for 5G.

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OFDM vs FDMC spectrum using different filter overlap factor (photo credit: Understanding 5G webcast)

 

It was a very interesting discussion, and, spoiler alert, it looks like OFDM is currently leading the way, but I encourage each of you to listen to the webinar for yourself.

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GFDM vs OFDM (photo credit: Understanding 5G webcast)

The discussion concluded with an end to end performance simulation of an FBMC reference source and receiver. It was a great way to visualize and sum all signal processing techniques in one model. It made a lot of sense for any type of physical layer designer who is researching new communications systems.

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AlyssaRao

What happened to the RF?

Posted by AlyssaRao Employee Jul 7, 2016

This is the second of three posts covering the highlights from the recent webcast, Understanding 5G and How to Navigate Multiple Physical Layer Proposals. In the first post, we talked about the different waveform techniques currently being investigated for 5G. Today I’m going to share a case study of a possible 5G modeling and simulation example at 28 GHz frequency band and 500 MHz bandwidth.

Physical layer designers know that their goal is to consolidate the hardware requirements of a network to enable the successful transmission of data. In order to do that, they need to consider both baseband and RF modeling together. In this example we will consider a 28 GHz frequency band and 500 MHz bandwidth. You can see the setup in the block diagram below.

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Block diagram of a 28 GHz frequency band and 500 MHz bandwidth. (Photo credit: Sang-Kyo Shin’s Understanding 5G webcast)

We chose a Filter Band Multicarrer (FBMC) Source for modeling the baseband in the time domain. For 5G opportunities, FBMC is being considered by many as a viable alternative to Orthogonal Frequency Division Multiplexing (OFDM).  FBMC tends to have lower Adjacent Channel Leakage Ratio (ACLR) than OFDM. In this model we combined the Baseband and RF blocks. Both the baseband and RF designers will need to work together for this simulation to be successful. Let's consider the spectrum outputs of each.

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FBMC Baseband Spectrum and RF spectrum. (Photo credit: Sang-Kyo Shin’s Understanding 5G webcast)

We already know FBMC already has good performance, and when we consider the FBMC Baseband Spectrum output it looks pretty good. But what happened to the RF?

When we consider the RF spectrum we see out of band leakage. What can we do to meet the spectral requirement of the transmitter signal? Experienced physical layer designers probably know the answer. We need to address the Peak-to-Average Power Ratio (PAPR) problem. This is a common problem for both OFDM and FBMC.  There are many PAPR reduction methodologies being researched in signal processing for 5G today. One of the latest techniques currently being investigated is clipping.  These researchers are using models and simulation such as this one to compare performance. Find out more by watching this webcast.

This post covers the new video on YouTube, How to Understand 5G: Beamforming. In this “How To” video you will learn about some fundamental concepts, functionality, and design applications of three types of multi antenna beamforming architectures at the system level. You will also learn about beamforming techniques being proposed for 5G and how they affect mobile communication performance. As antenna arrays get more sophisticated and increase in operating frequency the use of accurate system modeling and the channel effects are becoming crucial in the design process.

Baseband Beamforming architectures

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Figure 1. Baseband Beamforming System Architecture: Weighting factor Wi is a function of amplitude and phase with i {1..n} as number of antenna paths, precoding and combining are performed in BB.

In the baseband beamforming architecture we get large antenna gain and this enables multi stream, multi user connections with a variety of transmission modes. However, one of the biggest challenges designers face is when the design requires hundreds of antennas, which all need hundreds of power-hungry converters (both analog to digital and digital to analog). This high power requirement will increase hardware complexity and power consumption of the system and makes this architecture impractical for these types of designs. As a result, digital beamforming architecture is mainly used in mobile applications in base station downlink transmitters. It is interesting to note that because of digital beamforming’s high power consumption some of the digital beamforming proposals are for receivers to mitigate uplink inter cell interference.

RF Beamforming architectures

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Figure 2. RF Beamforming Receiver Architecture: Weighting factor Wi is a function of amplitude and phase with i {1..n} as number of antenna paths, precoding and combining are performed in RF.

 

In RF beamforming all the precoding and combining is done in the RF side. Compared to digital beamforming there are implementation advantages in terms of lower power consumption and lower hardware complexity.

Since high performance phase shifters in CMOS introduce phase and amplitude error verses frequency as well as phase variation verses the control voltage, the design of high performance phase shifters in CMOS turns out to be quite challenging. Some of the early 5G prototyping systems in the 63.5 GHZ frequency band has been proposed using RF beamforming architecture.

Hybrid Beamforming architectures

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Figure 3. Hybrid Beamforming System Architecture(Shared Array):
Baseband precoder(FBB) / combiner(WBB) using digital signal processing and RF precoder (FRF) / combiner(WRF) using phase shifter.

 

The hybrid beamforming structure combines the strengths of both analog and digital beamforming systems to reduce overall hardware complexity. In the hybrid structure the precoding and combining is done in both baseband (BB) and RF sections. By reducing the total number of the RF chains and analog to digital and digital to analog converters, hybrid beamforming still gets similar performance to that of digital beamforming, but saves power and complexity. With this structure even though we used a large enough number of antennas, the lossy mmWave channel naturally suppresses multi path interference and reflections.

You can design a real world multi antenna system using Keysight’s 5G simulation library and multi-channel RF models by following this “How To” video.

When designing mixed signal components you have to consider issues such as high sampling rates, quantization error, jitter, and high power consumption. In the antenna arrays at the system level you need a new mmWave channel model that supports multiple antenna paths and bandwidth in order to get a realistic picture of system performance. All of these complex issues can be solved only when you utilize trusted reference algorithmic modeling and innovative simulation methodology. Keysight SystemVue makes it easy to investigate new system architectures and create reliable system proposals and specifications. Also 3D visualization can help you identify and address problem areas that improve system performance at an early stage of your design.

Watch “How to understand 5G beamforming“ and download the workspace at: www.keysight.com/find/eesof-how-to-5g-beamforming now to get a head start with your 5G communication design.

Virtual Flight Testing of Radar System Performance

Flight testing is the primary method for evaluating the performance of a radar system. While an aircraft is in flight, data such as probability of detection, signal strength, and clutter might be gathered. Though effective, this approach does pose a number of testing challenges. The following explores the use of virtual flight simulation in the interest of saving time and money, while also increasing accuracy.

Challenges of Flight Testing:

  • In order to obtain statistically significant results, a large number of flights must be performed in order to yield an adequate data sample. The costs incurred in hands-on flight testing are thus sizeable. This method is simply too cost-prohibitive.
  • The data and test conditions from one flight run to the next are not repeatable, resulting in the need for multiple runs, and thus more money. Without the ability to easily replicate results, the time involved in the test environment is increased.

A Potential Solution:While in-field operational verification may still be necessary for contractual or legal reasons, “virtual flight testing” is a faster, more cost-effective alternative for earlier stages of R&D. The ability to simulate the full deployment and flight environment enables exceptional development speed and provides rapid prototyping capabilities of any radar system environment. With lessened time and money involved, simulation poses a viable solution to the testing challenge.In simulation:

  • Complex radar systems can be evaluated hundreds of times in an hour (Using the same/different scenarios for each run).
  • By evaluating realistic flight-testing scenarios before or in place of physical flight testing, engineers can validate electronic warfare algorithms earlier, saving both time and money.

The Virtual flight test solution was created by combining the capabilities of  Keysight SystemVue software with those of the AGI STK tool from Analytical Graphics. The W1461BP SystemVue Comms Architect is electronic system-level design software that integrates modeling, simulation, reference IP, hardware generation, and measurement links into a single, versatile platform. It enables system architects and algorithm developers to innovate the physical layer (PHY) of wireless and aerospace/ defense radar and communications systems, and provides unique value to RF, DSP, and FPGA/ASIC implementers. The W1905 Radar model library provides baseband signal processing reference models for a variety of radar architectures.

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Figure 1:  Interface between SystemVue and Analytical Graphics (AGI) STK product for multiple-target signal emulation.

As shown in Figure 1, one application of the interface between SystemVue and STK is the ability to do virtual flight testing of a radar system, including DSP, RF impairments, jamming, and interference as an aircraft encounters targets and clutter along a virtual flight plan.

To gain a stronger understanding of the interface between SystemVue and STK, and their application to virtual flight testing, consider the 3D STK simulation scenario of a fighter sortier (Figure 1). It starts at 10,000ft and is detected by the radar. It spot dives down to do low-level terrain following in order to get below the radar- sometimes successfully, sometimes not. This scenario can be reconstructed hundreds of times, with different radar or electronic countermeasure assets in place, by implementing SystemVue. The terrain, aircraft (including 3D RCS), and the radar site characteristics may all be easily modeled and analyzed.

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Figure 2: Multiple-Target Signal Emulation Example

In the multiple-target signal emulation example, shown in Figure 2, test entry data is entered through a customer user interface with full customization capabilities. The user does not have to open a simulation schematic. This approach integrates both signal generation and signal analysis. Here, SystemVue creates a radar waveform and passes it through a transmit chain to multiple target models (including jamming and added clutter). The resultant RF waveform can then be input into an arbitrary waveform generator and introduced into a receiver for performance validation. SystemVue also has a tight integration with MATLAB, C++, and HDL simulators, so existing radar algorithms may also be integrated into the scenario. Measurement-based data, such as a jammer profile or measured interference, could also be added into the simulation directly through Keysight test equipment links.

These scenarios can be evaluated in lieu of physical flight testing or, in cases where operational flight testing is unavoidable, they can be evaluated beforehand to ensure they make the most effective use of resources.

Some applications of virtual testing include:

  • Evaluating new jamming techniques or threats
  • Injecting multiple dynamic emitters and targets into scenarios
  • Allowing various types of jamming based on a defined set of criteria for dynamic operation
  • Modeling and evaluating cross-domain effects, such as automatic gain control

Virtual flight testing, made possible by the flexible interfaces between the SystemVue and STK software tools, now offers an economical alternative for R&D validation. This allows measurement-hardened algorithms to be deployed quickly, and any required field-testing to be performed with greater confidence. By moving testing into the lab and away from the field, time and money are spared, while measurement accuracy is improved.

You can read the full article on this topic here http://goo.gl/upi870 and download a free trial of SystemVue. http://goo.gl/S2fhR1.

W1720EP Phased Array Beamforming Kit is a new add-on software simulation for the SystemVue 2016.08 design environment. Keysight EEsof EDA’s W1720EP Phased Array Beamforming Kit overcomes two key challenges facing Active electronically scanned array (AESA) systems:

  • Engineers can easily model highly parallel architectures across multiple simulation domains, including nonlinear RF simulation, as well as a dataflow system level. This allows multiple teams to use the same tool and make architectural trade-offs not previously possible.
  • Engineers can also model the signals as single beams, or maintain access to the individual signals passing through the arrays. This enables multi-function, 3D conformal arrays to be validated in higher-level system scenarios using active signaling between multiple transmitters and receivers.

Who should use the W1720 Phased Array Beamforming Kit?

In typical R&D organizations, many engineering disciplines are required in phased array subsystem design.  The SystemVue Phased Array Beamforming Kit allows RF and baseband teams to use a model-based engineering approach across disciplines. This enables them to perform early R&D validation of phased array system architectures, components and beamforming algorithms, and then continue into hardware test.

System architects can integrate design information from multiple diverse teams, along with test waveforms, to produce winning architectures and proposals

Algorithm and beamforming designers can include RF design information, for more realistic accuracy

RF system architects can directly observe the effects of their RF arrays on high-level beam-level measurements, such as beamwidth, sidelobe levels & nulls, effective radiated power (ERP), and Gain/Temperature (G/T)

System Verifiers can validate scenario-level performance under a range of conditions, as well as automate regression suites, and link to high performance test and measurement equipment

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For more detailed application information, refer to:

-www.keysight.com/find/eesof-systemvue-phased-array
-www.keysight.com/find/eesof-systemvue-videos
-www.keysight.com/find/eesof-systemvue-phased-evaluation