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Welcome to Tim’s Blackboard! This is the place to find discussion on topics related to signal integrity and power integrity. Find other cool posts here!



Last time on Tim’s Blackboard, I talked about Continuous-Time Linear Equalization (CTLE). This week, I will take things to discrete-time and discuss Feed-Forward Equalization (FFE).


All the ADS content shown is in the attached workspace.

Make sure you apply for a free ADS trial and download the attached workspace to apply FFE to your own channel!


FFE Opens Closed Eyes

Illustrated in Fig. 1, Feed-Forward Equalization (FFE) can open a closed eye. However, unlike Continuous-Time Linear Equalization (CTLE), where the equalization is done with analog components in continuous-time, FFE happens digitally in discrete-time.  

Fig. 1: A statistical channel simulation in Keysight ADS to demonstrate Feed-Forward Equalization (FFE) opening a closed eye.


Today, we will take a closer look at Feed-Forward Equalization and how it opens closed eyes for us.


Concept of Feed-Forward Equalization Technique

In the time domain, FFE creates a pre-distorted pulse at the transmitter by combining delayed pulses multiplied by different weights. By choosing the correct weights to multiply each delayed pulse, one reduces the overall Inter-Symbol Interference (ISI) and opens the eye.


Knowing how the frequency-dependent loss of a channel spreads out the single pulse response, FFE generates a channel-specific pre-distorted pulse at the transmitter to compensate for the spread. An example FFE pulse is shown in Fig. 2.


Fig. 2: The overlay of FFE pulse to be transmitted and channel single pulse response shows FFE inserts pulses of negative amplitudes around the main pulse to cancel out positive amplitude ISI. 


Transmitted, the FFE pulse travels down the channel. As the positive main pulse spreads, the negative amplitudes surrounding the main pulse “cancel” out the spreading.


Fig. 3: The equalized single pulse is more contained because FFE reduces the ISI spreading.


Shown in Fig. 3 is the single pulse response of Wild River Technology’s 10-inch stripline channel before and after FFE. Compared to the original channel single pulse response, the equalized single pulse response shows reduced ISI.   

How does one generate the pre-distorted pulses?

Realization of Feed-Forward Equalization

Demonstrated in Fig. 4 is the transmitter architecture of FFE. Mathematically, the structure of FFE is identical to finite impulse response (FIR) filter, where a signal goes through delay elements, and each delayed signal is multiplied by a coefficient of different weight. The important difference is the coefficients.

Fig. 4: An animation of FFE generating a pre-distorted pulse at the transmitter.


We refer to the delay element as tap spacing, and one tap spacing is usually one Unit-Interval. The weighting coefficients are known as tap weights, or just taps.


The “cursor tap”, C0, has the largest magnitude of all the taps and is the main contributor of the entire FFE pulse. The subscript of each tap, then, indicates the location of the taps relative to the cursor tap. For example, the tap, C-1, is one tap spacing before the cursor tap. We further use the term pre-cursor taps to group the taps before the cursor tap, and post-cursor taps for the ones after.


One can also apply the cursor categorization to a channel single pulse response. Fig. 5 is an example of a channel single pulse response with corresponding pre- and post- cursors.



Fig. 5: Application of cursor categorization to channel single pulse response. The cursor is the point where maximum amplitude occurs. Before the cursor are the pre-cursors, and after, post-cursors.   


Marking the channel single pulse response sheds different light on our understanding of the channel. Shown in Fig. 6 are single pulse responses of a simulated lossless channel and a lossy one.


Fig. 6: Comparison between a simulated lossless channel and simulated lossy channel reveals more post-cursor ISI than pre-cursor.


One observes frequency-dependent loss of the channel causes ISI in the pre-cursor and post-cursor. Moreover, for the simulated channel in Fig. 6, there exists more post-cursor ISI than pre-cursor. Consequently, in this case, our selection of the tap values would focus on correcting post-cursor ISI.


In practice, user informs FFE algorithm how many pre-cursor and post-cursor taps to use. FFE algorithm then calculates proper values for pre-cursor and post-cursor taps to eliminate ISI.

How do we compute the tap values!?

Algorithms to Identify Tap Values

No hard work required! Keysight ADS has FFE algorithms built-in to compute taps that optimize the eye opening. Nonetheless, "Advanced Signal Integrity For High-Speed Digital Designs” provides a good pencil-and-paper example of FFE Zero-Forcing solution [1].


There are also adaptive equalization techniques that compare the desired equalizer output and the actual equalizer output. Adaptive FFE techniques such as Least-Mean-Square (LMS) and Recursive-Least-Squares (RLS) are available in Keysight ADS.

Fig. 7: Keysight ADS adaptive algorithm setup window.


Shown in Fig. 7 is the adaptive algorithm window where user specifies different parameters for different adaptive algorithms.  


Comparison Between CTLE and FFE

In the time domain, we should expect both techniques to correct for pre-cursor ISI and post-cursor ISI. However, because of the continuous-time, analog nature of CTLE, we expect CTLE to provide only limited improvement in pre-cursor ISI. On the other hand, operating digitally in discrete-time, we expect FFE to reduce ISI in both pre-cursor and post-cursor.

Fig. 8: Equalized single pulse response comparison between CTLE and FFE. Because of its digital nature, FFE corrects ISI beyond the first pre-cursor.  


Shown in Fig. 8 is the single pulse response after CTLE and after FFE. As expected, CTLE barely provides ISI reduction beyond the first pre-cursor. In contrast, FFE can correct more pre-cursor ISI based on the number of the taps specified by the user.


Seen the frequency domain, we expect CTLE to have a high-pass filter characteristic as specified by the zeroes and poles of the filter. In the case of FFE, because of the nature of finite impulse response filter, we expect amplification and attenuation of different harmonics of Nyquist Frequency.   


Fig. 9: Comparison between CTLE and FFE spectrum. As CTLE uses the high-pass filter response to counter the channel low-pass response, FFE amplifies the odd harmonics of the Nyquist frequency to equalize the channel. 


Shown in Fig. 9 is the frequency response of CTLE and FFE. From the comparison, we see as CTLE focuses on boosting frequency content at the Nyquist frequency, FFE algorithm is selecting taps that effectively amplify the odd harmonics to achieve desired equalization result.  


Feed-Forward Equalization Summary

By selecting proper taps, FFE uses delayed pulses to cancel out ISI in the time domain. Viewed in the frequency domain, FFE effectively amplifies the odd harmonics of the Nyquist frequency and reduces ISI. 


So far, both CTLE and FFE are linear equalizers. In the next post, we will cover a non-linear equalization technique: Decision Feedback Equalization (DFE).


Make sure you apply for a free trial and download the attached workspace to apply FFE to your own channel!

That's this week's Tim's Blackboard. Find other cool posts here!


See you next time!



[1]       S. H. Hall, Advanced signal integrity for high-speed digital designs. 2009.

Engineers make simulation reports all the time. However, it is tedious to copy-paste images from ADS to PowerPoint. An easier way to transfer your ADS images to PowerPoint is shown in this short video.


Using the Export_Images add-on, available for download below, ADS users can quickly and easily save images in their schematic, layout, and data display window, and import them into a PowerPoint Presentation. This method is faster, easier, and will provide you with high-quality images for your simulation reports.


Figure 1. The add-on ( can save images from all three window displays above: schematic, layout, and the data display window.


Step 1: Enable the Add-On. Including a custom Add-On is simple and useful in ADS.



Step 2: Initiate the “Export Images” command. From here, ADS downloads all of the images in your workspace at once, so you can save time when making your PowerPoint report.



Step 3: View and place your images. After exporting your images, a folder will appear with all of the images you need to finalize your report.



Step 4: Create your Simulation Report. (And enjoy all the time you saved using the add-on!)


Watch the YouTube video now to get started exporting images for your next simulation report on PowerPoint.


Download the attachment below:

Have you ever found yourself in a situation where the characterization software did not support the hardware you were trying to use?  Your tests may be complex, where the measurement conditions of your next data point depend on previous measurement results.  I have found that using Python integrated with the IC-CAP software leads to a powerful and flexible solution that is supported by an open community. To help with the test development, I have found it useful to create a software layer that handles error checking and low-level function calls. In what follows, I'll describe the use of a "PyVISAWrapper" that can simplify your test suite development.


My Motivation

I found myself in a tricky situation when I started using IC-CAP to characterize and model my memristor devices. I needed to perform a quasi-static measurement to precisely control the ramp rate of the voltage sweep by adding a hold time and source delay time, and to control the delay between measurements. However, in some tests, the measurement conditions for the next measurement in IC-CAP depend on previously measured values. Because of that, IC-CAP’s built-in, general-purpose instrument drivers didn’t support my need to perform a quasi-static measurement.


The solution I found to my dilemma was to write Python code in IC-CAP to control my instruments. The process builds on my previous post, Extending the Power of IC-CAP with Python - PyVISA Instrument Control. Using this process, you too can write Python code to control your instruments and create highly flexible measurement routines.


The PyVISA library turned out to be a great way for me to meet these goals, plus it enables portability across several control interfaces (e.g., GPIB and LAN). And, it was tempting for me to dive right in and start writing instrument specific commands using the default GPIB interface. Instead though, I took a step back and thought about how to make my Python code more general. To that end, I decided to create a wrapper for PyVISA’s low-level library functions that would allow me to send the most common VISA calls to control an instrument (e.g., open(), write(), read(), query(), etc.).


PyVISA Wrapper Utility

You might ask, “Why employ a wrapper utility to use the PyVISA library for instrument control?” It’s a fair question and the answer is pretty straightforward. The wrapper utility may be considered a high-level API for controlling instruments. With carefully constructed API function calls, an engineer can more easily create a suite of tests leveraging smarter I/O function calls, including writing instrument commands, querying responses, checking for command complete events, parsing the measurement data, checking for errors, and providing meaningful troubleshooting information.


What follows are details on how you can use an open source PyVISA wrapper utility I wrote called to simplify writing custom Python code to control almost any instrument. The example code provides the same functionality as the _init_pyvisa macro presented in my last article, but it also adds some useful features described above. The pyvisawrapper API facilitates communication with any instrument that uses TCP/IP or USB, in addition to the standard GPIB. Using the E5270B analyzer as an example instrument, I’ll revisit the _init_pyvisa macro and illustrate the advantages of using the pyvisawrapper functions over low-level function calls.



Since for this process, we’ll leverage the IC-CAP Python library, as well as the PyVISA library, using import statements, it’s important to make sure you have your Python environment configured correctly. Here’s a few of the basic prerequisites:

  1. Install IC-CAP_2016_01 or later, under Windows 7 in the default installation directory, which is typically C:\Keysight\ICCAP_2016_01.
  2. Install the Keysight IO Libraries 17.x software and configure it to use the VISA library visa32.dll. This dynamic link library will be installed in the C:\Windows\system32 directory.
  3. Configure and test communication with your instruments using the Keysight Connection Expert software.
  4. Before attempting this example, install and configure a virtual Python environment and install the PyVISA library presented in my aforementioned article, Extending the Power of IC-CAP with Python - PyVISA Instrument Control. Key to this process is the installation of a standalone Python interpreter, which will be great for developing experimental Python scripts and debugging in programming tools for making future modifications to your custom code, like pyvisawrapper itself, outside of the IC-CAP environment.
  5. Download and copy the script to your user directory. I personally like to create a sub-directory under my account C:/Users/username/iccap/python to store my own custom python code.
  6. Set the ICCAP_USER_PYTHON_PATH environment variable in your Windows 7 advanced systems settings to add this directory to the search path. This will allow IC-CAP to find your Python scripts.
  7. You will need some instruments that can be remotely controlled via GPIB or LAN. Any instrument will do.


Keysight E5270B with ASU



The following is a high-level overview of the code we are going to implement:

  • Test your new virtual Python environment installed as part of the prerequisites.
  • Create a new IC-CAP macro named _pyvisa_run.
  • Activate the virtual Python environment from your script.
  • Import the and modules from the IC-CAP and virtual Python 2.7 environments.
  • Import the to use the high-level API functions in your macro.
  • Use the visaOpenSession() function to access the PyVISA ResourceManager
    and perform the VISA open() on the Keysight E5270B resource via the GPIB interface.
  • Use the visaCloseSession() to close the resource before exiting the script.
  • Use the visaQuery() function to send the *IDN? command to the E5270B and read its response.
  • Use the visaClear() function to perform a GPIB device clear and leave the GPIB interface in a initialized state.



Step-By-Step Process for Using pyvisawrapper


Step 1. Verify your new virtual Python environment

Verify the activated Python 2.7 environment by checking the system path 'sys.path' and system prefix 'sys.prefix.' To do this, open a Windows command shell and perform the following steps:

Activate the (icenv) virtual environment

C:\Users\username> workon icenv

(icenv) C:\Keysight\IC-CAP_2016_01\tools\win32_64>

Change the directory to virtual env (icenv)

C:\Users\username> cdvirtualenv

Check the Python interpreter version for (icenv)

(icenv) C:\Users\username\Envs\icenv> python -V

The version should return:

Python 2.7.3

Start the interactive Python interpreter for the virtual environment.

(icenv) C:\Users\username\Envs\icenv> python

You should see something like the following:

Python 2.7.3 (default, Feb 1 2013, 15:22:31) [MSC v.1700 64 bit (AMD64)] on win32

Type "help", "copyright", "credits" or "license" from more information.


Now, enter the following commands at the Python >>> interactive prompt:

>>> import sys 
>>> print sys.prefix

You should see something like the following:


Now type:

>>> print sys.path

You should see something like the following:


To exit the virtual Python interpreter type:

>>> quit()

(icenv) C:\Users\username\Envs\icenv>

Leave the virtual environment by typing:

(icenv) C:\Users\username\Envs\icenv> deactivate


If you made it this far then your icenv virtual Python environment is setup and ready to be used from IC-CAP.

Step 2. Start IC-CAP, then create a new model file and add a new macro

Go the the main IC-CAP menu and select File, then New. Name your model file ‘pypvisa_example’.


pyvisa example model file


Select the Macros tab and then click New… to create a new macro.


Enter _pyvisa_run for the name of the new macro.


_pyvisa_run python global macro


Step 3. Add variables to the IC-CAP Model Variable table

Select Model Variables and enter the following variables in the Model Variable table:


iccap model variable table

We'll describe each of these variables as follows.

  • The interface  variable should be set to the VISA resource string as listed under the My Instruments panel in Keysight Connection Expert or after performing a scan for instruments. This is also the string returned from PyVISA after sending the list_resources() function to the default resource manager.
  • The visaResponse variable holds the response string from the latest command sent to the instrument.
  • The error_status is a list of values to look for in the status byte register that would indicate an error.  This information should be available in the instrument's programming guide. In the case of the E5270B analyzer, the decimal value for the error status bit is 32. The error status could potentially be returned as 48 if the Set Ready bit is also active, or 128 if an emergency error is reported after the last command sent.
  • The error_command is the list of instrument specific commands necessary for returning the error code and the error message string from the instrument's message buffer. In our E5270B example, the error commands are "ERR?" and "EMG?", with "EMG?" being the command that is sent after processing the list of codes returned from the "ERR?" query. This command will return the error message string for the associated error code passed as a parameter when performing the query.  "ERR?" is the query that works with the B1500A to do extended error reporting. 


The pyvisawrapper code performs all of this detailed error checking for you!  This is incredibly handy.  Simply setting the debug variable to 1 in the Model Variable table will enable debug prints in the macro and pyvisawrapper, and output verbose debug text that is displayed in the IC-CAP Output window. This information will aid you in troubleshooting your Python code.


Step 4. Activate the virtual Python environment

Add the following two lines to your macro

activate_this = "/Users/username/Envs/icenv/Scripts/"
execfile(activate_this, dict(__file__=activate_this))

The "username" in the first line is the name of the current user logged into your Windows 7 machine. This generic name is a place holder for the commands listed below and represent the current user's home directory. 


_pyvisa_run activate virtual python environment


Step 5. Import the functions and

Add the following two lines to your macro

from iccap import icfuncs as f, MVar 
from pyvisawrapper import *

_pyvisa_run macro python imports

Now we have access to all the functions in and


Step 6. Add some local variables and variables that access the Model Variable table

Add the following lines to your macro:

bOk = True                                          # return status of the called function 
cmd = ""                                            # command string
instr = MVar("interface").get_val()                 # visa resource to use from model var table
rsp = MVar("visaResponse")                          # visa response string from read or query
stat = MVar("error_status").get_val().split(",")    # status byte to check for error condition
err = MVar("error_command").get_val().split(",")    # error command to send to query error event
debug = MVar("debug").get_val()                     # enable/disable debug prints            
qdelay = 1.0                                        # delay for visa query

_pyvisa_run macro global variables

Here we are just reading variables from the IC-CAP model variable table and storing them to local Python variables.


Step 7. Use the high-level API function visaOpenSession to access the VISA Resource Manager and open a link to the E5270B resource

Add the following lines to your macro:

# open session and return visa resource link 
vl = visaOpenSession(instr)
if debug: print vl 

# close visa session
bOk = visaCloseSession(vl)
if debug: print "visaCloseSession: ",bOk

You should always close the VISA session when you are done with a resource. Not properly closing the session can cause errors if you attempt to re-open the same resource later.


_pyvisa_run open close session script lines


Execute your macro and you should see something like the following displayed in the IC-CAP Output window:

default source manager: Resource Manager of Visa Library at C:\Windows\system32\visa32.dll 
resources list: (u'ASRL10::INSTR', u'GPIB0::17::INSTR')

pyvisawrapper::visaOpen: True inst: GPIBInstrument at GPIB0::17::INSTR

GPIBInstrument at GPIB0::17::INSTR

pyvisawrapper::closeSession: True

visaCloseSession:  True

You did not need to import to access the VISA resources since handles that for you. It also handles calling the visa.ResourceManager() and using your GPIB0:17::INSTR resource string specified in the Model Variable table.


If this step has errors, then you probably did not install and configure the GPIB VISA driver software application or the instrument is not on the bus. Otherwise the list will not return the GPIB resource with the address of your instrument. The communication drivers installed as part of the prerequisites allow you to 'scan for instruments.' National Instruments provides NI MAX (Measurement & Automation Explorer). Keysight interfaces provide Keysight Connection Expert. These software applications should be installed with your 488.2 and VISA drivers for your communications interface.


Step 8. Send your first command to the instrument to return its identifier string

Add the following lines to your macro:

cmd = "*IDN?" 
if bOk: bOk = visaQuery(vl, cmd, rsp, 10000, stat, err)
print "visaQuery: {} cmd returned {}".format(cmd, rsp.get_val().split(","))

_pyvisa_run ident query script lines

Execute your macro and you should see something like the following displayed in the IC-CAP Output window:

intr: GPIBInstrument at GPIB0::17::INSTR cmd: *IDN? rsp: <iccap.MVar instance at 0x000000000E11B608> 
timo: 10000 stat: 48 err: <iccap.MVar instance at 0x000000000E11B488>

pyvisawrapper::visaQuery() True read: Agilent Technologies,E5270B,0,B.01.10

bytes: 39 

pyvisawrapper::visaQuery: True *IDN? returned ['Agilent Technologies', 'E5270B', '0', 'B.01.10\r\n']

NOTE: The instrument was found on interface GPIB0 at address 17 and returned its identifier string in the visaQuery response.

Step 9. Do some clean up and leave the system in an initialized state

It is good practice to send a GPIB device clear before closing the interface.

To do that, add the following lines to your macro:

bOk = visaClear(vl) 

if debug: print "visaClear: ",bOK


_pyvisa_run visa clear script lines


Step 10. Test the completed _pyisa_run macro

Execute your macro and you should see something like the following displayed in the IC-CAP Output window:

default source manager: Resource Manager of Visa Library at C:\Windows\system32\visa32.dll 
resources list: (u'ASRL10::INSTR', u'GPIB0::17::INSTR')

pyvisawrapper::visaOpen: True inst: GPIBInstrument at GPIB0::17::INSTR

GPIBInstrument at GPIB0::17::INSTR
intr: GPIBInstrument at GPIB0::17::INSTR cmd: *IDN?
rsp: <iccap.MVar instance at 0x000000000C39DF08> timo: 10000 stat: 48 err: ERR?

pyvisawrapper::visaQuery() True read: Agilent Technologies,E5270B,0,B.01.10

bytes: 39 

pyvisawrapper::visaQuery: cmd *IDN? returned ['Agilent Technologies', 'E5270B', '0', 'B.01.10\r\n']

pyvisawrapper::clear: True inst: GPIBInstrument at GPIB0::17::INSTR 

visaClear: True
pyvisawrapper::closeSession: True
visaCloseSession: True

Example of pyvisawrapper's Error Processing

Now, let's look at an example of the error processing, which will help you find errors occurring in your code. Again, this is one of the real advantages of using the pyvisawrapper API. Without it, you would have to write instrument specific code in your Python script to detect, query and display any errors.


Let's purposely create an example of a common type of error such as sending an illegal argument or command to the instrument, and see how it is handled by the pyvisawrapper.  Let's change our macro slightly to send the command "ID?" instead of "*IDN?"


Change the following lines to your macro:

cmd = "ID?" 
if bOk: bOk = visaQuery(vl, cmd, rsp, 10000, stat, err)
print "visaQuery: {} cmd returned {}".format(cmd, rsp.get_val().split(","))

_pyvisa_run error gen script lines

See the error on line 20?

Execute your macro and you should see something like the following displayed in the IC-CAP Output window:

intr: GPIBInstrument at GPIB0::17::INSTR 
cmd: ID?
rsp: <iccap.MVar instance at 0x000000000BFF0348>
timo: 10000
stat: 48
err: ERR?
Query error VI_ERROR_TMO (-1073807339): Timeout expired before operation completed. - last command: ID?
visaQuery: cmd ID? returned ['visaError : 100 : Undefined GPIB command.\r\n']

With no error checking, we would only get the timeout error "VI_ERROR_TMO (-1073807339)".  That doesn't say much, does it?


What's Next?

If you've successfully completed all of these steps, then you should now be able to access the most common functions of PyVISA, the pyvisawrapper API from IC-CAP. And that means you can now very simply create new transforms for instrument control and data acquisition over any supported interface.

In a future article, I’ll outline the steps for using the ideas presented here to create a series of transforms to perform an Id versus Vg quasi-static measurement on a discrete NMOS device. In other forthcoming articles, I'll show you how to use more of the powerful features included in IC-CAP and exposed through the I'll also use the again to write Python code for accessing an instrument and returning measured results. I'll even show you how to access more of the internal IC-CAP functions and data structures, which are provided to enable additional analysis and plotting functions in IC-CAP.

In the meantime, I hope you find this tutorial and the pyvisawrapper utility useful in exploring the various possible ways you can extend IC-CAPs powerful framework to characterize and model your most challenging devices. For more information on IC-CAP or Keysight IO Libraries, go to and



About Python If you are new to Python programming, here’s some information to help you follow the steps in this blog. Python is an "interpreted" language, which means it generally executes commands typed by the user in an interactive command shell. This is convenient for testing program statements to learn the Python syntax. However, a more common means of writing a Python program is to create a Python script file with the '.py' extension. Say you created an example program and save it as '' To run the program, you simply type 'python' at the command shell prompt. Python scripts, which are often called modules, can also be used for creating libraries of functionality, and are distributed along with program resources in packages. Packages can be installed and combined with user-generated code to extend a program's functionality. PIP is the Python package installer that integrates with—the Python Package Index. It is a repository of numerous free Python applications, utilities and libraries. PIP allows you to download and install packages from the package index without manually downloading, extracting and installing the package via the command 'python install'. PIP also checks for package dependencies and automatically downloads and installs those as well. An environment is a folder (directory) that contains everything a Python project (application) needs to run in an organized, isolated manner. When it’s initiated, it automatically comes with its own Python interpreter—a copy of the one used to create it—alongside its very own PIP.




Extending the Power of IC-CAP with Python - PyVISA Instrument Control

Keysight IC-CAP Device Modeling Software

Keysight IO Libraries Suite

The Python Tutorial — Python 2.7.13 documentation

User Guide — virtualenv 15.1.0 documentation

PyVISA: Control your instruments with Python — PyVISA 1.8 documentation

Welcome to Tim’s Blackboard! This is the place to find discussions on interesting topics related to signal integrity and power integrity.


This week on Tim’s Blackboard is “Eye-opening Experience with CTLE,” where we study one of the equalization techniques. This post has an associated ADS workspace. Download it now!


CTLE Opens Closed Eyes

In the previous post, we discussed how frequency-dependent loss of a channel causes the eye to close and concluded with the use of equalization to open the eye.


Fig. 1: A statistical channel simulation in Keysight ADS to demonstrate how CTLE of different DC attenuation opens closed PAM4 eyes.


Today, we will take a close look at Continuous-Time Linear Equalization (CTLE) and how it opens closed eyes for us, see Fig. 1.


Concept of Equalization

As I am writing this section, I ask myself,

“What does equalization imply in a non-technical context?”

And I am pleasantly surprised by Merriam-Webster Dictionary.



Recall that a lossy channel distorts the spectrum of the original single pulse unevenly. Seen in the time domain, the sharp transitions of the pulse spread out at the beginning and the end, as demonstrated in Fig. 2.


Merriam-Webster is right! To equalize is to make the frequency-dependent loss evenly distributed throughout a wide range of frequencies.


Fig. 2: Because the lossy channel attenuates higher frequency components more than lower frequency ones, the sharp transitions at the beginning and the end of the single pulse spread out.


Continuous-Time Linear Equalization Technique

Fig. 3 shows a collection of Continuous-Time Linear Equalization (CTLE) responses for a reference receiver according to IEEE 802.3bs Draft Standard for Ethernet (October 10th 2017).


Fig. 3: A collection of CTLE responses for a reference receiver according to IEEE 802.3bs standard for Ethernet. To illustrate the behavior of the CTLE response, the x-axis of the graph is normalized to the Nyquist frequency.


Plotted against the Nyquist frequency, the curves of CTLE response give us insights on how CTLE evenly distributes the loss. While the CTLE response peaks at frequency close to the Nyquist to preserve content at higher frequencies, there is loss to attenuate spectral content at lower frequencies.


The construction of the CTLE response is that of a peaking filter with three poles and two zeros, defined by




where  is the CTLE gain,  are the CTLE poles,  is the CTLE zero and  are the CTLE low frequency pole and zero. An excel spreadsheet of the reference CTLE coefficients can be downloaded here. The coefficients are taken from Table 120E-2 of the October draft standard.    


On a system level, we are adding an equalizer block after the channel. Applying the multiplication property, in the frequency domain, we can view the channel and equalizer block together as the response of an equalized channel, as demonstrated in Fig. 4.


Fig. 4: Illustration of the combined equalized channel response consisting of channel and equalizer.


Application of CTLE

Fig. 5 shows the insertion loss of a 10-inch stripline channel from Wild River Technology’s ISI-32 platform. We can see the level of insertion loss increases with frequency. In other words, channel loss is unevenly distributed throughout frequencies.


Fig. 5: Left: Wild River Technology's loss characterization ISI-32 platform. Right: the insertion loss of a 10-inch stripline channel from the platform.


Because the goal of equalization is to provide a more evenly distributed loss through a wider bandwidth than the original channel, we would expect the equalizer to improve the unevenness of the original channel.


Shown on the left of Fig. 6 is a comparison between the 10-inch stripline channel and the CTLE response. As channel loss drops with frequency, CTLE provides a peak to counteract the effect.


Fig. 6: Left: channel response and CTLE response comparison. As the S21 of the channel drops, CTLE picks up to even out the increasing loss. Right: comparison between the original channel and equalized channel. The equalized channel has a more even frequency response throughout the frequencies below Nyquist.


Shown on the right of Fig. 6 is the equalized channel. The CTLE has successfully created more even loss curve than the original.     

But how do I know for sure the loss of the equalized channel is really more even for wider bandwidth than the original?

To compare the responses of the channel before and after equalization on an equal footing, we normalize the equalized channel response to have 0 dB of loss at low frequency. Fig. 7 is the result of the two curves. Allowing the two responses to have identical loss at low frequency, we observe that, indeed, the equalized channel provides a more even frequency response for a wider frequency range.   


Fig. 7: Comparison between original channel and the equalized channel response (normalized). The comparison demonstrates that the equalized channel provides a more even frequency response up to close to Nyquist.  


Single Pulse Response with CTLE

Since CTLE improves the evenness of the frequency response, we should consequently expect the single pulse response in time domain to improve as well. In particular, we expect a restoration of the transitioning edges which was distorted by the original high frequency loss. After equalization, the spread of the single pulse should be reduced. 


Fig. 8: After equalization, the single pulse spectrum is restored and results in the reduction of spread of the single pulse in the time domain.


Fig. 8 shows simulation results consistent with our expectation. As we apply more and more DC attenuation to restore the spectrum, the spread of the single pulse keeps decreasing.


However, to my surprise, the maximum eye opening does not happen at maximum DC attenuation at 9 dB.


From the animation above, one observes both the reduction of the spread and reduction of amplitude. Until 6.5 dB of CTLE DC attenuation, the spread of the single pulse is positive and reaches almost zero at 6.5 dB. As the DC attenuation increases to more than 6.5 dB, the single pulse spectrum is restored too much, resulting in a negative dip at the end of the pulse.      


Achieve Maximum Eye-opening 

Because the single pulse response is a special case of an eye diagram, we would also expect the eye to exhibit the same behavior. The eye opening should reach a maximum at around 6.5 dB of DC attenuation.


Fig. 9: ADS statistical channel simulation of an eye to show the eye opening with different CTLE configurations.


In Fig. 9, one can somewhat make out the increase of eye opening as the eye amplitude decreases. To identify the precise eye width and height, we plot the width and height measurements against the CTLE configurations, see Fig. 10.


Fig. 10: Eye width and eye height for different CTLE configuration. As expected, the maximum of eye width and eye height occurs at 6.5 dB of DC attenuation.


As expected, at 6.5 dB of CTLE DC attenuation, both eye height and eye width are at the maximum. However, this might not be always the case. Every channel is a little different, and every eye is a little different. Therefore, it is important and necessary to perform analyses in both frequency and time domain, view the single pulse response and review eye diagrams.


More Equalization Techniques

Although the IEEE reference CTLE curves are all passive and have maximum 0 dB gain, depending on the need, CTLE implementations can also be active and have positive gain. As the name “continuous-time” suggests, one implements CTLE with analog components. Nonetheless, equalization can also be done in discrete-time with digital signal processing.


In the next two posts, we will discuss equalization in the discrete-time such as Feed Forward Equalization and Decision Feedback Equalization. Make sure you apply for a free trial and download the attached workspace to apply IEEE reference CTLE's to your own channel!


That's this week's Tim's Blackboard. See you next time!

Welcome to Tim’s Blackboard! This is the place to find discussions on interesting topics related to signal integrity and power integrity.


This week on Tim’s Blackboard is “Root Cause of Eye Closure,” where we study one of the root causes of eye closure.

After reading the post, download the attached ADS workspace to experiment with Fourier Transform and channel simulator!



Even when you do everything right, i.e., using controlled impedance lines and termination strategy, loss remains a problem when traces are long and when transmitting in the Gigabit regime.


Specifically, it is the frequency-dependent loss that significantly degrades the signal quality at the receiver. Fig. 1 demonstrates the resulting eye diagrams of frequency-dependent loss and constant loss with the same loss at Nyquist frequency.

Fig. 1: ADS simulation of two different channels with the same loss at Nyquist frequency. The eye closure of the channel with frequency-dependent loss is more prominent than the channel with constant loss (Eye Diagrams are offset to illustrate the eye closure).


Given the same transmitter, receiver and same loss at the Nyquist frequency, the channel with frequency-dependent loss introduces more Inter-Symbol Interference (ISI) and degrades the eye horizontally more than the channel with constant loss.

But how?

In this post, we will transmit a single pulse and use our knowledge of time domain and frequency domain transformation to learn the impact of frequency-dependent loss.


Single Pulse in Frequency Domain

To view the pulse in frequency domain, we perform Fourier Transform to decompose the input signal, channel, and output signal into their corresponding frequency spectrum. Fig. 2 shows the mathematical relationship of the input, the channel, and the output.


Fig. 2: Illustration of performing Fourier Transform on the time domain input-channel-output relationship.  


After the transformation, the time domain convolution corresponds to multiplication in the frequency domain. The output spectrum is the product of the input spectrum and the channel frequency response after multiplication.


Fig. 3 demonstrates a single pulse going through a channel in both time and frequency domain. Since the frequency domain and time domain are two sides of the same coin, if we have the frequency spectrum of a time domain signal, we could apply Inverse Fourier Transform on the spectrum to retrieve the time domain representation.


Fig. 3: Sending a single pulse through a channel.


We see difference in the shapes of the input and output single pulse spectrum in Fig. 3, and we know the channel ought to change the input spectrum, but

How does the channel frequency response cause the spread of the output time domain waveform?    

To answer the question, let’s take a closer look at the time and frequency domain relationship.


Reconstruction of Waveform from Spectrum

Frequency domain representation shows how different frequency components interact with each other to create the time domain waveform. The constructive and destructive interference of sine waves of different frequencies works together to form the time domain waveform.


Thus, the shape of the frequency spectrum is important when one wants to reconstruct and maintain the shape of the original time domain waveform. For example, if we were to divide the the amplitude of the entire spectrum by two, we should expect the resulting time domain waveform to still be a single pulse, but with half of the original amplitude.

Fig. 4: Time domain and frequency domain representation of the original and modified waveforms in ADS. Because different frequency components work together to produce the shape of the original pulse, if the relative strengths of all components are identical, the shape of the time domain waveform is the same


Fig. 4 shows a modified spectrum of the same shape and the result of Inverse Fourier Transform. As we expect, because the same modification, dividing by two, is done to the entire spectrum, the relationship between different frequencies is the same. Consequently, the shape of the single pulse waveform is maintained in the time domain, and the peak amplitude is indeed half of the original.


However, if we don’t treat the spectrum as a whole, and we alter only a small part of the spectrum, we expect to see a small change in the spectrum to produce a dramatic change in the shape of single pulse waveform, as shown in Fig. 5.


Fig. 5: Although the spectrum is modified a little bit, the relative strengths of different components are different. The new shape of the spectrum no longer corresponds to the original single pulse.


Although Fig. 5 is an extreme case where a small part of spectrum is removed, it underscores the importance of treating a given spectrum in its entirety to maintain the corresponding time domain waveform.


To see how the single pulse would look after going through the channel, let’s take a look at how the channel treats different frequency components.  


Channel Frequency Response Changes Spectrum

We can see from Fig. 6 the frequency response of the channel modifies the spectrum differently at different frequencies. Therefore, we expect the shape of the reconstructed pulse to be different from the original.

Fig. 6: Channel frequency response shows more attenuation at higher frequencies than lower frequencies.


Specifically, because the channel attenuates higher frequency components that make up the sharp transition more than the lower frequency ones, at the output of the channel, the rising and falling transitions of the pulse will spread. 


A comparison of lossy channel and lossless channel in Fig. 7 shows consistent result with our expectation. The lossy channel distorts the spectrum of the original input pulse unevenly. Seen in the time domain, the sharp transitions of the original pulse spread out at the beginning and the end.


Fig. 7: Because the lossy channel attenuates higher frequency components more than lower frequency ones, the sharp transitions at the beginning and the end of the single pulse spread out.


The spreading of the single pulse is known as the inter-symbol interference (ISI) because the current pulse interferes with the one pulse before and the one after. To reduce ISI is to reduce eye closure.      


How to Avoid Eye Closure

Because of frequency-dependent loss closes the eye, to open the eye, we do the following:

  1. Reduce the amount of loss,
  2. Remove the frequency dependence of the loss.


Given a fixed data rate, to reduce the amount of loss, we can:

  • Keep trace as short as possible,
  •  Use substrate with lower Dk and Df,
  • Use smoother conductor and as low resistance as budget allows.


To remove frequency dependence of the loss, we can equalize the spectrum with different equalization techniques:

  • CTLE: Continuous Time Linear Equalizer,
  • FFE: Feed-Forward Equalizer,
  • DFE: Decision Feedback Equalizer.


Fig. 8 shows an example of applying equalization to open an eye.


Fig. 8: Equalization result of ADS channel simulation (Eye diagrams are offset to illustrate the opening).


The next blog talks more about the different equalization techniques and how to perform them in ADS.

Make sure you apply for a free trial and download the attached workspace to experiment with Fourier Transform and channel simulator!


That's this week's Tim's Blackboard. See you next time!

Signal and Power Integrity engineers look to ADS for the correct treatment of high-speed effects like distortion, mismatch, and cross-talk. Building on the strong foundation and loyal users ADS has amassed through the years, ADS 2017 delivers new options and functionality that enable it to be the tool today's designers need to get ahead.


The latest release of ADS is a stronger, faster, and more comprehensive platform for signal and power integrity analysis. Read about the top 10 new features in ADS 2017 for Signal and Power Integrity Engineers or watch the video.


10. Improved substrate editor

The new and improved substrate editor has an efficient edit feature for a larger number of layers. The simplified editor interface reduces simulation setup time and increases productivity.

ads2017 substrate editor

9. Fast Wire labeling

Labeling ports with the correct node names is time consuming, especially when you have many ports. With the new CSV import labeling, naming more than 10 ports is simple. 

ads2017 fast wire labeling


8. Parallel Sweep on windows

In ADS 2017, Batch simulation is able to run in Turbo mode in both Linux and windows. Using the 8-pack Element license and simulation manager, you can unleash the parallel computing power of your workstation PC. Reduce simulation time of large sweeps with simulation manager.

ads2017 parallel sweep


7. Statistical mode PAM -4

To simulate a PAM-4 signal down to 10 ^ -16 BER, a bit-by-bit simulation would take hours. ADS 2017 now supports PAM-4 in statistical mode. You can directly simulate PAM-4 to very low BER in a matter of seconds to minutes.


6. Mixed-mode S-parameter Checker

In the improved S-parameter checker, you can now convert single-ended S-parameters to mixed-mode in a few clicks. Save time and increase your productivity by letting the S-parameter checker show you the mixed-mode response.

ads2017 mixed mode s-param checker


5. S-parameter Spectral Thresholding

Usually, you would expect simulation speed to decrease with higher port count. In ADS 2017, the spectral thresholding algorithm removes weakly coupled ports before simulation. The result is faster simulation speed for a higher port count, without sacrificing accuracy.

ads2017 faster simulation


4. New and improved IBIS Components

Are you looking for specific pins in your IBIS model to interact with? The improved IBIS component interface helps you quickly sort and select desired pins. With built-in smart default settings, the IBIS schematic is cleaner, and setup time is faster.
ibis components


3. 3D Via Designer: Enabling Access to Accurate Via Models

A crucial problem when simulating high-speed signal interconnects is a lack of access to via models that are accurate at high frequencies. To solve this problem, ADS 2017 introduces Via Designer, a tool for creating and modeling PCB vias (single-ended or differential), while giving you full control over the via specifics.
ads2017 3d via designer


2. PIPro Bill of Materials Optimization for Decaps

Decap Optimization in PIPro can take all the decaps as laid out on the board, and search for the optimal solution that meets the desired target impedance profile. The user can define an optimal solution, by specifying weighted criteria such as: number of decaps, unique models, vendors, or cost. PIPro's algorithm intelligently ranks your best candidate solutions so you arrive at the best trade-off between performance and cost.

decap output


1. PIPro DC Electro-Thermal Capability

To find the true IR-drop of your power distribution network, thermal effects need to be considered in your analysis. PIPro performs an automated, iterative electric and thermal solve on each PDN, providing thermal insights to every power integrity engineer. PIPro calculates the temperature distribution of the board, so you can ensure the temperatures of vias, traces, and devices in your design are within the specification.  

ads2017 electro-thermal



These 10 new features are just the beginning of all the new capabilities and usability enhancements in the latest release of Advanced Design System (ADS) 2017. Along with improvements for the Signal and Power Integrity Designers are improvements for RF/MW designers doing RF front-end module and Silicon RFIC design. Check out all the new features on the web page and apply for your free trial of ADS 2017 today.

free trial of ADS 2017

FREE Evaluation of ADS | Keysight EEsof EDA  

Many of you know Matt Ozalas, RF Design Engineer at Keysight Technologies, and his infamous YouTube video series, How to Design an RF Power Amplifier. I got a chance to talk to him about what he’s most excited about in the latest ADS release.

Matt Ozalas, RF Design Engineer at Keysight Technologies


Kaelly: I heard ADS 2017 is being called the “3D release”. What 3D capabilities are you excited for?


Matt: It’s 2017, we’ve got hoverboards and self-driving cars -- we should be designing in 3D by now, right?  Besides the “wow” factor, some tasks are really useful to do in 3D.  I think a lot of designers will feel the same way after trying the new capabilities in ADS 2017 out.  In ADS 2017, those 3D capabilities span design, simulation, and visualization.   So, physical design becomes more realistic early on, the simulation is easier to set up, the results are more accurate, and the analysis becomes more meaningful. 

 3D layout, ADS 2017

In ADS 2017, you can design a layout in three dimensions. You can route a trace or stitch a VIA more precisely in a dense module or chip, and you can select complex structures much more easily in 3D.  This might seem trivial but we’ve all been in that spot where a VIA gets missed or the routing goes to the wrong layer and that causes big problems down the line. Designing in 3D prevents these mistakes from the outset.  The 3D selection also helps if you’re trying to do an EM simulation, getting all the right structures selected is not always easy.  You can even thermally simulate multiple technologies at the same time, like a chip stacked on a substrate.  Let’s face it, no one can afford to overlook these things in the design process anymore, mistakes cost too much and reliability problems are too critical to leave to chance.  Just ask those people making hoverboards.

 RFIC layout, ADS 2017

Kaelly: Designers are always looking for ways to save time. Is ADS 2017 faster than its previous release?


Matt: Yes, let’s look at EM simulation for example.  The Momentum 3D planar EM simulator now uses multi-threading for substrate calculations in ADS 2017.  What does that mean?  Well, typically substrate calculations only use one processor, but for example, your Windows machine probably has four processors.   In ADS 2017, Momentum farms those calculations out to the different processors and so on that Windows machine, you will see a 4x speed improvement in the substrate calculation.   By the way, in Momentum, the substrate calculation is usually the most time-consuming piece.  Now, what about 3D Finite Element Method (FEM) Simulation?  Well, in ADS 2017, this 3D engine has a turbo mode which distributes the simulation frequencies to different processors, and that of course, speeds up the simulation time dramatically.   

 FEM in ADS 2017, finite element method

Kaelly: I know there are many usability improvements in ADS 2017. Which ones are most exciting to you?


Matt: The way I look at it, no matter how good a capability is, if it isn’t easy to use, I probably won’t use it.  So 3DEM simulation is faster, right?  Great, but what about getting your design into that EM engine?  If that takes too long, all the speed improvement is less meaningful.   In ADS 2017, we looked closely at the EM setup process, like what steps designers take before they run an EM simulation.  They set up a substrate, then perhaps if they want to analyze a sub design, they’ll cut that part out, remove unwanted metal, add ports, go play around with some EM settings, and finally click run.   A lot of steps. 

3D EM in ADS 2017


In ADS 2017, you will find that every one of those steps is easier.  The substrate editor has a table definition feature which enables you to easily create and modify highly complicated substrates with lots of layers.  A grouping capability allows you to much more easily group items you want to be modeled. There are even features that allow you to more easily place multiple ports and pins, and assemble and define ports. Separately, these features might not seem all that exciting, but put them together and the result is undeniable: fast and simple EM simulation setup.


Anyone who has ever used the ADS Electro-Thermal simulator knows that defining a substrate involves a text-based file, but not anymore. With ADS 2017, you can accomplish that task using the substrate editor. Just imagine how much easier it will be to visualize your thermal stackup using the substrate editor, rather than writing it into a cryptic text file.


Another great new feature in ADS 2017 is its multi-technology support (e.g., Chip on Package). In the past, if you had a chip that went into a board or module, you then had to simulate those two technologies. You could do it, for sure, with the ADS Electro-Thermal simulator, but it required a 3-page procedure and was impossibly difficult. With ADS 2017, that simulation of multiple technologies just works.


Kaelly: What’s the ADS Python Data Link that I keep hearing about?


Matt: I have been using this capability for all kinds of neat things. This is what I’m most excited about in ADS 2017. In essence, you can take your ADS simulation result and run it through a Python script by just using an equation in data display. The ADS data goes into Python, the script gets run, and the results come back to ADS in one step.  It’s like hooking a rocket engine onto ADS Data Display – and the best part is you never have to leave the simulation environment.  The possibilities are endless: 3D plotting, instrument connectivity, loadpull contours from measured data, all that stuff becomes easy to do, and you don’t even need to know Python to take advantage of it because the scripts already exist and they just run in the background.  The best application I’ve seen of this feature so far is plotting ADS simulation data on a cylindrical 3D Smith Chart, called the “Smith Tube”.  Look up the Smith Tube on IEEE Explore, it is so cool.  It will change the way you think about circuit design – seriously!

 ADS 2017 Data Link with Python

Kaelly: Thanks Matt! I’ll have to check that out.


If you want specific information on any of the features Matt mentions, and some that he didn’t, check out the ADS 2017 release webpage.


free trial of ADS 2017

FREE Evaluation of ADS | Keysight EEsof EDA  



LTspice is a freeware SPICE simulator offered by Linear Technologies (now a division of Analog Devices Inc.). LTspice was originally called “SwitcherCAD” and was designed with switch-mode power supplies in mind. As a result, it is widely used in power electronics. IC-CAP may be used to generate device models based on measured data using multiple simulators: not only our own ADS Transient and Harmonic Balance (for periodic state state) simulators, but also transient analysis in LTspice, giving engineers the option to create workflows as needed.  For an engineer that might want to generate a model based on measured data using LTspice as the simulation engine, here's a look at how you do that.

Flow diagram, showing LTspice to IC-CAP link


But before delving into the details of that process, it's worth noting that as of this writing, the LTspice documentation describes support for seven different MOSFET device models:


2MOS2 (A. Vladimirescu and S. Liu, October 1980)
3MOS3, a semi-empirical model
4BSIM (B. J. Sheu, D. L. Scharfetter, and P. K. Ko, May 1985)
5BSIM2 (Min-Chie Jeng, October 1990)
6MOS6 (T. Sakurai and A. R. Newton, March 1990)
8BSIM3v3.3.0 from University of California, Berkeley, July 29, 2005
9BSIMSOI3.2 (Silicon on insulator) from the BSIM Research Group, February 2004.
12EKV 2.6 (M. Bucher, C. Lallement, F. Theodoloz, C. Enz, F. Krummenacher, June 1997.)
14BSIM4.6.1 from the BSIM Research Group, May 18, 2007.
73HiSIMHV version 1.2 from the Hiroshima University and STARC.

How to Link IC-CAP to LTspice

If you have no background on how to link IC-CAP to an external simulator, I recommend you read my previous post
entitled, “Link the IC-CAP Modeling Tool to External Simulators.” It will provide you with an overview of the basic process, along with some troubleshooting tips.


LTspice is not officially supported by IC-CAP. However, we have a workaround to successfully link IC-CAP to LTspice IV by disguising it as a SPICE3 look-alike. To date, this workaround has not yet been tried on LTspice XVII.


Assuming you have LTspice installed on your system, here are the steps:

  1. Append the following line into your $ICCAP_ROOT/iccap/lib/usersimulators file.

    ltspice spice3 $ICCAP_ROOT\src\ltspice3.bat "" CANNOT_PIPE

    We used spice3 as the template_name, so that IC-CAP will treat the simulation input/output files as if it were for SPICE3, which is natively supported.

  2. Download the ltspice3.bat file from the attachment below.

    Note, the file was renamed to ltspice3.txt for security concerns. After you download it, please rename it back to ltspice3.bat.

    Open and edit ltspice3.bat on line 30. Make sure it reflects the correct path to the LTSpice IV executable scad3.exe, as shown below:

  3. Move the ltspice3.bat file to directory $ICCAP_ROOT/src.

  4. Restart IC-CAP.

Verify the Simulation Link to LTspice IV


Now, let’s verify that it works, to ensure we can indeed use LTspice as the simulator engine for IC-CAP model parameter extraction. To do that:

  1. Load the following *.mdl example file from within the IC-CAP program:../Examples/model_files/mosfet/nmos3.mdl
  2. In the model Variables, add the variable SIMULATOR and set it to ltspice.


  3. Go to the /large/idvg/ setup, and clear out the simulated data using Clear -> Simulated. Any previously saved simulation will be gone.


    We now see only the measured data (symbols) on the plot, whereas simulation data would be shown as solid:
  4. Simulate.


  5. In the same DUT/Setup, open the plot tab under the /large/idvg/idvsvg plot, and confirm that the simulated data appears.


The simulated data is represented by solid lines on the plot.


So there you have it! By following this process, you can now use LTspice as your simulator for model parameter extraction within IC-CAP.

A new video by Wolfspeed demonstrates how the Wolfspeed ADS process design kit (PDK) is configured to work with the Keysight ADS electrothermal simulator to co-simulate electrical and thermal performance together.


Figure 1. Wolfspeed’s process design kits work with Keysight Technologies’ ADS electrothermal simulator to co-simulate electrical and thermal performance together.


The electro-thermal simulation capability allows designers can see the impact of thermal effects on circuits while still in the design stage, and account for those effects early on in the design process. This becomes especially helpful when using a high power density technology like SiC or GaN.


Wolfspeed is the largest SiC and GaN wide bandgap Power and RF fabrication facility worldwide. They are the leading supplier of SiC and GaN materials, providing lighter, faster, and more powerful devices to industry experts around the world. Wolfspeed offers non-linear, scalable GaN HEMT models for MMICs, as well as full PDKs for Keysight Technologies’ Advanced Design System (ADS).



Figure 2. Wolfspeed’s video shows allows designers can see the impact of thermal effects on circuits while still in the design stage, and account for those effects early on in the design process.


Because of their dedication to a more energy efficient future, Wolfspeed takes the lead in the innovation of power and wireless systems with wide-band semiconductors. These materials enable devices to function at higher voltages, frequencies, and temperatures, allowing for broader use of alternative energy devices. The electro-thermal simulator accounts for significant thermal effects that often occur with these increasingly popular materials.

You can watch Wolfspeed’s new video below. They walk you through the process of co-simulating electrical and thermal performance using the Wolfspeed PDK.



To learn more about the ADS Electro-Thermal Simulation Element, watch this 30-second video or visit



FREE Evaluation of ADS | Keysight EEsof EDA 

Keysight’s latest release of SystemVue 2017 is the industry’s leading simulation platform for system design and verification, giving designers the earliest possible head start in entering the high-margin 5G market.


With its unique 5G functionality, SystemVue 2017 now makes it possible for 5G cellular system, RF component, and chipset vendors to create pre-5G-compliant reference designs. Designers can start pre-5G now and continue forward into the final 5G New Radio (NR) standard as it becomes available.

 5G verification library

Figure 1. SystemVue 5G Verification library merges Verizon and KT 5G wireless standards with 100GHz mmWave channel model and adaptive beamforming needed for 5G cellular base stations and handsets.


The new software adds functionality not possible with other 5G electronic design automation (EDA) solutions on the market today. Unique features include the ability to incorporate S-parameters of off-the-shelf phase shifters and attenuators, and X- or Sys-parameters of nonlinear amplifiers and mixers.


In addition to its powerful 5G and phased-array functionalities, SystemVue 2017 offers three important updates designed to enable early electronic product designs with high margin and volume potential for emerging standards:


  1. New Automotive Radar library, which features unique pedestrian channel models with micro-Doppler detection of moving pedestrians
  2. NB-IoT or LTE-Advanced Pro, which is an enhancement to the LTE-Advanced baseband verification library for validating Narrow-Band Internet of Things (IoT) product designs
  3. 802.11ax enhancement has also been added to the WLAN baseband verification library for designing even higher speed WiFi networking

 Phased Array Architext

Figure 2. SystemVue 2017 Phase Array Architect allows accurate RF S-, X- and Sys-parameters of amplifiers, phase shifters, attenuators to be used in Phased Array Antenna system design.


5G communications systems architects can quickly iterate and validate their 5G designs, allowing developers to cross traditional Baseband and RF boundaries in order to innovate the physical layer of next-generation communications systems.


For more information on SystemVue 2017, go to




Get your free trial today!



A high-quality device model captures device behavior across geometry (W/L), temperature (T), drive voltage (Vdd), among numerous other input conditions. How much time do we spend trying to achieve a good fit across all these axes? What if we could easily bring up graphs of all key device targets such Vth (Threshold Voltage), Idsat (Drive Current), GM (Transconductance), and their variations across these dimensions?  We could then monitor them in one place, and tune or optimize model parameters while observing the agreement between measured and modeled data.  With Keysight’s Model Builder Program (MBP) 2017, we can achieve this goal. In this note, we are going to go through a couple of examples to show how MBP Script makes it possible to monitor device targets across the entire matrix of input conditions.


First, let’s look at the Threshold Voltage (Vth) variation as we vary device width (W) and length (L) on 4 sides of the W/L matrix, as shown below. 

Figure 1. Four sides of the W/L matrix for evaluation of Vth variation


The 4 sides of W/L space define the boundaries of modeled device sizes provided by a given semiconductor technology. A customer may use a geometry outside of this space, but will then need to re-target the model parameters for this unusual device.


Vth is the key device parameter of any transistor device, be it BULK, SOI or FinFET.  It defines when a transistor transitions from off to on.  If the Vth has been well modeled along the 4 sides of the W/L space, then we have good confidence that the model will work over the entire W/L plane. Both short and narrow channel effects will be covered.

By placing Tasks in sequence, a user may define a real modeling flow to be executed automatically.  A “Task” is object to represent a step in a flow, and is represented by a blue icon in the flow panel, as shown below in figure 2.  With Tasks, a modeling engineer can group modeling building blocks to extract the next logical group of device parameters.  In MBP, we may create a new Task button, as shown below, called “Display_Vth_Scaling_4_sides.”  By  clicking on this button, we can define and display the related graphs.


Figure 2. Display Vth W/L scaling plots by Task button clicking


In figure 2, we plot Vth in a 2x2 layout, where each quadrant represents one side of the W and L scaling space.  The solid represents simulated data and the square represent measurements.  The MBP tool is now ready for model tuning or optimization.


To create this beautiful matrix of graphs, we need to create a new Task from MBP Script window and name it “Display_Vth_Scaling_4_sides,” as shown in figure 3.  In the newly created Task, in its Plot Select tab, click the “Add Plot” button to add these 4 plots.  We may populate the “Plot Name” using 2 of the predefined plot groups “vth_l_vbs” and “vth_w_vbs.” In the “filter define” field, we may filter the data based on desired input conditions, like “w=max(w)”.  The filter definition is highlighted in green for the first plot where vds=abs(min(vds)) && w=max(w). In other words, we filter the data for the absolute minimum Vds, and maximum W input conditions. 



Figure 3. Create a Task by grouping Vth W/L scaling plots


MBP provides the most commonly used device targets, including Vth, Gm, Idsat, Idlin, etc. as well as common plot templates like the scaling graphs over W, L, T and Vdd.


One powerful plot type shows how well the model has been fitted across input conditions like geometry.  This is called an “Error Data Grid” plot.  In figure 4, we present the RMS error of device targets Vth and Idsat in our 2-dimensional geometry plane. However, we can choose pairs of input conditions to study, for example:

  • W and L
  • W/L and T
  • W/L and VDD


Figure 4. RMS Error plots of Vth and Idsat across W/L plane.


When tuning model parameters, we can observe the RMS errors update on the fly. For example, slightly different model parameter settings lead to the following Error Data Grid plots:

Figure 5. another state of the RMS Error plot of Figure 4.


The numbers are color-coded for quick and easy reading.


In figure 6, we illustrate how to create these incredibly useful Error Data Grid plots. In MBP’s Script window, we choose our device target (Idsat), specify the X and Y axes as ‘w’ and ‘l’ below, coloring for various RMS error ranges, etc. We can even add more targets to our Error Data Grid plot.


Figure 6. ErrorDataGrid plot creation


These newly created plots can be integrated in the Flow as another Task button, as shown below:

Figure 7. Display RMS Error plots by Task button clicking


Every Task object has a few properties of which “button mode” is one.  When the task is in button mode, then when you click it, it executes just that code to do an action, like extracting a group of parameters.  When the task is not in button mode, clicking on it has no immediate effect.  Rather, it marks where the flow may resume. 


By monitoring a model’s performance (RMS error) across all input conditions, MBP provides a high-level view of the model in real time.  Our modeling engineer may enjoy the peace of mind that the device model has been done thoroughly and accurately.


Please see the attachment below.  We have attached an example project that includes:

  1. demo data files
  2. demo model files, initial version and final version.
  3. script file that defines the flow Tasks and ErrorDataGrid plots


For more details about how to customize device targets and plots and how to customize the flow, please refer to the MBP Script tutorial.




You have a waveform that was generated in MATLAB. How do you use that waveform as the source for a circuit in Genesys?


Keysight’s RF/Microwave Synthesis and Simulation Software, Genesys understands MATLAB. The full-featured MATLAB script debugger in Genesys enables you to develop error-free, fully compatible equations for data processing, simulation, and analysis. Genesys equation pages use MATLAB, so it is very easy to generate MATLAB waveforms in Genesys. You can paste MATLAB code directly onto a Genesys equation page to create any waveform.


Figure 1. You can easily import a MATLAB waveform into Genesys, and use that waveform as a source for a circuit.


Genesys Understands MATLAB

Running the MATLAB code in the equations page allows you to see and verify the waveform. Here, the waveform is stored and plotted in a variable called “PulseTrain”. The user will run the Equations first, and then the variable will be used by the source in the Genesys design.


Figure 2. The waveform is stored and plotted in a variable called “PulseTrain.” (Click image to zoom.)


How to apply the waveform to a circuit

In order to apply the waveform to a circuit, use a Custom Voltage source which allows us to specify a variable, PulseTrain, for the V parameter.


Figure 3. The variable PulseTrain is available for the source to use in the Genesys design.


From here, all that’s needed is to set up the Transient simulation for the desired time step and stop time. Run the simulation, and see the results below.





To use a waveform developed in MATLAB:

  1. Paste the MATLAB code that creates the waveform into an Equation page in Genesys.
  2. Assign the variable containing the waveform to a Custom Voltage source on the schematic.
  3. Run a Transient simulation.
  4. View the results.


Check out the related application note here.





Click here for a free trial of Genesys.

Having trouble getting started with your next circuit design? Keysight EEsof EDA’s YouTube channel is filled with “How To” videos and examples to help you with your complex designs. In each video, Keysight engineers walk you through the steps while also covering the fundamentals of each topic. At the end of each video, you can download the workspace to help get you started on your own projects. These five videos are a must-see for anyone working with Keysight ADS.


1. How to Design an RF Power Amplifier: The Basics

This video shows how power amplifier circuits work. If you are new to high-frequency power amplifier circuit design, this is the place to start. If you are an experienced designer, this video provides unique insights into the fundamentals that you may not have seen before. There is also an entire playlist dedicated to this topic on our YouTube channel.


Questions answered include:

  • What is AC power?
  • How is AC power generated and dissipated?
  • What topologies are convenient to use for power amplifier circuits?
  • What is a loadline and how can this be used to design a power amplifier?



2. How to Design for Power Integrity: Selecting a VRM

This video is one of a three-part series in Power Integrity tutorials. There are many factors to consider when selecting a VRM (Voltage Regulator Module), and this video covers two: Output Impedance and PSRR (Power Supply Rejection Ratio). This video uses measurement-based simulations to show that current mode topology is the best choice for flat impedance VRM.


Questions answered include:

  • What factors should I consider when selecting a VRM?
  • Why is flat impedance the PDN design goal?
  • Why is VRM selection not arbitrary?


3. How to Use Fixture De-embedding to Match Signal Integrity Simulations to Measurements

This video provides a quick 4-step process to show how to de-embed a fixture from a measurement to validate a PCB channel model, and then how to embed the fixture with the model to do a direct compare of simulation to full-path measurement both in the frequency domain and time domain.


Questions answered include:

  • How can I match SI simulations to measurements?
  • How can S-parameters simplify the problem?
  • What is the best process to solve this problem?


4. How to Design Phased Array Systems

This video discusses the most important considerations for phased array system design, especially popular for 5G. It begins with the basics of phased array design, then covers 4 key parameters of phased array architecture. After watching this video, you will be able to download the simulation tool, SystemVue, to perform your own phased array modeling and simulations.


Questions answered include:

  • How does a phased array work?
  • What are the key elements of phased array architecture?
  • What factors influence the far field pattern?




5. How to Understand 5G: Beamforming

This video guides you through what kinds of multi-antenna system architectures are being researched for the next generation 5G standard. It provides examples with end-to-end link level simulation and demonstrates key technical issues of different multi-antenna beamforming system design under mmWave channel environments.


Questions answered include:

  • How does beamforming work?
  • How can I model and simulate for key multi-antenna systems architectures?
  • Is hybrid beamforming too good to be true?
  • What is the 3GPP channel model for mmWave frequency band?




These are just five of the growing library of “How to” videos from Keysight EEsof EDA. Apply for a free trial of ADS or SystemVue to get started on your own designs.




Click here to apply for a free trial of ADS.


Keysight EEsof EDA is introducing a new set of tools for 5G, starting with pre-5G modulation analysis. This new technology is geared toward innovators with 5G testing in mind.  The 89600 VSA software provides comprehensive analysis capabilities for pre-5G signals based on the Verizon 5G open trial specifications.  With the standardized pre-5G technical specifications, engineers are already taking steps toward signal analysis.


vsaFigure 1. 89600 VSA users can observe pre-5G uplink and downlink physics layer measurements based on the Verizon 5G specifications. This example shows a downlink signal with 8 component carriers.


5G networks promise faster speeds, higher data rate, easier connectivity, and better network performance. Pre-5G allows users to experience certain 5G network elements while ensuring compatibility with their current 4G and LTE platforms.


Keysight’s latest 89600 VSA software helps break through the complexity of pre-5G, and will do the same for 3GPP 5G New Radio (NR). 3GPP 5G NR is the emerging global 5G standard. It is expected to be included in Release 15 of the 3GPP standard, which is due out later this year. With Keysight’s new 89600 VSA software release, early adopters can design and verify performance to the draft specification now, before it is published. Its extensive set of tools for demodulation and vector signal analysis enable you to explore virtually every facet of a signal and optimize even the most advanced designs.  


Figure 2. The 89600 VSA software will unify and accelerate the development process by providing
frequency-, time-, and modulation-domain analysis results in a single measurement.


The 89600 VSA software will unify and accelerate the development process by providing frequency-, time-, and modulation-domain analysis results in a single measurement. Users can observe pre-5G uplink and downlink physical layer measurements based on the Verizon 5G specifications. The 89600 VSA software is a vital and effective tool that will help blaze the trail to the 5G frontier.



The latest 89600 VSA software has over 100 recorded demo signals available for trial users. Discover the fundamentals of pre-5G air interface parameters, physical channels and signals.


Read the technical overview for more information on pre-5G signal analysis.


See the vast capabilities of the 89600 VSA Pre-5G Modulation Analysis in this four-minute video tour.



You can now jump start your 5G development for Verizon 5G, and continue for upcoming 3GPP 5G NR with a free trial of the 89600 VSA software.


“The important thing in science is not so much to obtain new facts as to discover new ways of thinking about them.”-Sir William Henry Bragg Inventor of X-ray spectrometer, Nobel Prize for Physics, 1915


Much like Sir William Henry Bragg stated, often, the recipe for new discovery entails new light, so elements can be viewed in a fresh perspective.


This week on Tim’s Blackboard, I will start with the motivation for Fourier to introduce his series, follow by his unintentionally visit to the frequency domain, and end with how the new frequency domain view helps us understand the root cause of eye closure. 


Fourier and “The Analytic Theory of Heat”

Whenever frequency domain is in a conversation, there is no escape from mentioning the name of this famous mathematician and physicist: Joseph Fourier.


Fig. 1: Jean-Baptiste Joseph Fourier. Image credit:


Although well-known for Fourier Series and Transform, in his 1800’s publications, the French-born scientist in Fig. 1 was originally analyzing heat flow.  


To solve the heat equation in a metal plate, Fourier had the idea to decompose a complicated heat source as a linear combination of simple sine and cosine waves, and to write the solution as a superposition of the corresponding eigen-solutions. Nowadays, this superposition or linear combination is known as the Fourier Series [1].


Fourier Series: Unfamiliar Yet Familiar

Although trying to represent a complicated function with linear combinations of sine and cosines might sound foreign, the decomposition of a complicated element into simpler sub-elements is a familiar idea.


In his lecture on Fourier Series, MIT Professor Dennis Freeman cleverly illustrates the similarity between Fourier Series and the Cartesian representation of an arbitrary vector in 3D-space [2].


Fig. 2: An arbitrary vector in 3D-space.


Shown in Fig. 2 is an arbitrary vector in 3D-space. Without additional coordinate information, our view of the vector is a geometric one: a line. However, as soon as we place the vector in a coordinate system, the vector geometry translates to vector magnitudes and directions. In a Cartesian system, there are three different components: one in x-direction, one in y-direction and one in the z-direction, as demonstrated in Fig. 3.


Fig. 3: Representation of an arbitrary vector in 3D-space in Cartesian coordinates. The original vector is separated into three components of various magnitudes in different directions.


The concept of Fourier Series is extremely similar. In Fourier Series, one deconstructs a periodic function into sines and cosines of different frequencies. The different frequencies of cosines and sines are analogous to the different directions in the Cartesian coordinates.


Take a classic ideal square wave for example. Fig. 4 shows the comparison between representing a vector in 3D-space and expressing a square wave with Fourier Series.


Fig. 4: Comparison between a vector in 3D-space and an ideal square wave expressed in Fourier Series. The sine waves of different frequencies correspond to the different directions in Cartesian coordinate system. 


It is important to note in Fig. 4, the “…” in the Fourier Series expression indicates an infinite sum of sines with only odd harmonics. Mathematically, we write



Unlike the vector in 3D-space, where only three magnitudes and directions are needed to recreate the vector, we need infinite number of magnitude and directions to truthfully represent the ideal square wave in Fourier Series.


But Tim, what if instead of infinite number of odd harmonics, I only have the first 10?


In ADS, there is a Vf_Square source that lets you experiment with the number of harmonics you desire to be in the Fourier Series. The result of the simulation is in Fig. 5.


Fig. 5: ADS simulation result of including only the first 10 odd harmonics in the square wave.


Stepping into Frequency Domain

Writing a function in the form of Fourier Series gives us a fresh perspective. Specifically, by looking at the Fourier Series construction of a function, we are able to visualize the frequency components present in the function and the strength of each frequency component.


Let’s revisit the ideal square wave expression, the Fourier Series shown below has both “direction” and “magnitude.”



Because the multiplication factor in front of ω0 indicates the frequency of the sine wave, we plot the factor, n, on the x-axis. For each nth harmonic, there is a specific magnitude that goes on the y-axis. Fig. 6 illustrates the parameters we are plotting.

Fig. 6: Illustration of what goes on a frequency domain plot. On the x-axis, we plot the harmonics, and we plot the magnitude on the y-axis.


Fig. 7 displays the log-log plot of frequency domain spectrum up to the 100th harmonic of the sine wave component that makes up the ideal square wave. The 1/n relationship of the magnitude and harmonic is made clear in a log-log plot.  


Fig. 7: Frequency spectrum of an ideal square wave up to the 100th harmonic. The magnitude of the harmonics is inversely proportional to the order of each harmonic. 


Extension of Fourier Series

Indeed, Fourier Series is very useful when it comes to representing a periodic waveform. Nonetheless, one major limitation of Fourier Series is the assumption of periodic waveform.


Let’s take the impulse response of a channel for example. Fig. 8 is the waveform of a channel we investigated in Dirac Delta Misnomer. The impulse response is NOT a periodic function. If I am interested in the impact of the channel on different frequency components, I would need a way to transform the aperiodic time domain response to the frequency domain.

Fig. 8: Time domain impulse response of a channel is not a periodic function.


In the next post, I will show that with the help of Fourier transform, an extension of Fourier Series, I can convert the time domain impulse response to the frequency domain insertion loss, as shown in Fig. 9.


Fig. 9: Frequency domain representation of the time domain impulse, also known as the insertion loss.


Because the insertion loss plot gives us valuable information on how each frequency component is affected by the channel, we can then identify the root cause of eye closure.



As Sir William Bragg points out, new discovery requires a new point of view. There is no doubt Fourier’s approach to the heat equation is a novel one.


By using Fourier Series, we examine the ideal square wave through the frequency domain looking glass. In the next weeks, we will see how we apply Fourier transform to understand the root cause of eye closure.    


That's this week's Tim's Blackboard. See you in two weeks!


Experiment with the square wave source: 



Wikipedia contributors, "Fourier series," 9 August 2017. [Online]. Available:


D. Freeman, "6.003 Signals and Systems," Massachusetts Institute of Technology: MIT OpenCourseWare, Fall 2011. [Online]. Available: