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While IC-CAP is equipped with a powerful library of transforms and examples for performing model parameter extraction, we may extend this power using the built-in Python support in IC-CAP to access external Python libraries, especially when developing new behavioral models or implementing custom analysis routines.


In my previous article, I showed how to implement a quasi-static measurement in a series of IC-CAP transforms, demonstrating the flexibility of the data handling capabilities in IC-CAP.  Python modules like and modules extended the data parsing using external libraries. In this article, I will show you how you can also easily implement custom parameter extraction routines using Python in IC-CAP. Leveraging the work I presented in my previous blog entitled "Measuring Sub-Threshold MOSFET Characteristics Using a Quasi-Static I-V Method", I'll discuss a custom Python transform for extracting the Vth parameter (gate threshold voltage) on the quasi-static Id vs. Vg sweep data of a p-channel MOSFET.


We will be implementing the ICON (constant current) method for extracting Gate Threshold Voltage (Vth) from the Id vs. Vg data. This is a popular method due to its simplicity. Other popular methods ( i.e. Id_sat or Max_Gm methods ) can be similarly implemented using custom Python classes and functions.




Depending on whether you happen to have an E5270B (or B1500A) or an older 4156C, you might prefer to download the complete IC-CAP model file py_new_api_basic_demo_5270.mdl or py_new_api_basic_demo_4156.mdl attached at the end of this post.

E5270BAgilent 4156C


Each model file contains the complete Python source code used to implement the quasi-static measurement. I recommend saving these *.mdl files to C:\Keysight\ICCAP_2018\examples\python, as I described in my previous article Measuring Sub-Threshold MOSFET Characteristics Using a Quasi-Static I-V Method. In these .mdl files we previously created the global arrays vvalue[ ] and ivalue[ ] in the _run transform for storing our forced voltage and measured current data values. In the _calc_vth transform we will access these arrays to extract the Vth value by calling an external Python script also attached below. You should copy the to your C:\Users\<username>\iccap\python directory or the directory specified by the environment variable ICCAP_USER_PYTHON_PATH.


Load the IC-CAP Model File


Assuming you saved the model file to the examples folder (C:\Keysight\ICCAP_2018\examples\python), click 'File/Examples...' and select: python\py_api_new_basic_demo_5270.mdl. (or *_4156.mdl).


Select the idvg_quasi Setup, go to the 'Extract / Optimize' tab and then select the _run transform.

The following arrays are defined to store the local I-V measured data:


# global list of values
vvalue = []
ivalue = []



Notice that the global namespace is set in the Function field by selecting PythonGlobal. This gives us access to the ivalue[] and vvalue[] along with vg_points (from the vgpts Setup Variable) which will be used in the extract_vth_cc function _calc_vth() below.

Go to the end of the _run transform and uncomment the following lines of code:


# calculate vth
if bOk: iccap_func("_calc_vth","execute")



Select the idvg_quasi Setup, go to the 'Extract / Optimize' tab and then select the _calc_vth transform.


from extract_vth_cc import * 
# Calculate Threshold voltage for IdVg measurement

# Uses _extract_vth which implement Icon method (IdVg@Vb=0)
# Device parameters

# W = channel width (um)
# L = channel length (um)
# M = channel mask multiplier
# deltaW = channel width variation
# deltaL = channel length variation 
# get W, L from Model Variables
W = float(MVar("W").get_val())
L = float(MVar("L").get_val())
M = 1.0
icon = 1E-8
deltaW = 0
deltaL = 0
if debug: print "W = {} L = {} M = {} icon = {}
                 deltaW = {} deltaL = {}\n".format(W,L,M,icon,deltaW,deltaL)

if polarity == "PMOS":
   icon *= -1
# get Id[] Vg[] from _run
ids = ivalue[:vg_points]
vgs = vvalue[:vg_points] 

# get Id_Vg @ Vb=0
evt = extract_vth_cc(ids, vgs, W, L, M, deltaW, deltaL, icon)
vth = evt.calculate() 

print "vth = ", vth


The _calc_vth transform instantiates the extract_vth_cc class and initializes it by passing the measured data arrays ids and vgs along with the device geometry W, L, deltaW, deltaL and icon parameter (constant current value for extracting the gate threshold voltage). Once the extract_vth_cc instance is created, the calculate() function (or method) is called to return the Vgs that gives the current closest to the icon value.


Open the Python source code in your favorite editor.


Review the implementation of the extract_vth_cc class and calculate method. source code listing

import numpy as np
from iccap import MVar
# Global variables
# enable/disable debug prints
debug = int(MVar("debug").get_val()) 

# extract_vth_cc script for extracting threshold voltage
class extract_vth_cc:    
   def __init__(self,id,vg,W,L,M,deltaW,deltaL,icon):
       Initialize extract_vth_cc class.

       This function initializes the class used to extract Vth using
       the ICON method.

          self:      This instance of the extract_vth_cc class.
           id:        Drain current array values.
           vg:        Gate voltage array values.
           W:         Device channel width.
           L:         Device channel length.
           M:         Channel mask multiplier.
          deltaW:    Channel width variation.
           deltaL:    Channel length variation.
           icon:      Constant current to extract Vth.

       Returns:       instance of class

       """ = id  # a list [] = vg  # a list []
       self.W = W
       self.L = L
       self.M = M
       self.deltaW = deltaW
       self.deltaL = deltaL
       self.icon = icon
       # calculate and return Vth
       def calculate(self):
          Calculates the gate threshold voltage.

          This function extracts the extrapolated Vth value by using
          the ICON method.

             self:      This instance of the extract_vth_cc class.


             Vth:       Interpolated gate threshold voltage at icon.

        # initialize local variables 
        vth =1E-30
        type = 1       # nmos        
        vg =
        id =

        # create numpy array and initialize
        nid = np.zeros([len(id),1])
        # copy id to numpy array and flatten
        nid.flat[:] = id

        # compute the id reference value from device geometry
        iref = self.icon * self.M * (self.W - self.deltaW)/(self.L - self.deltaL)
        if debug: print "iref = {}".format(iref)
        # return the index closest to the reference value
        idx = (np.abs(nid - iref)).argmin()
        if debug: print "idx = {} id = {}".format(idx, id[idx])        
        # check if vg is negative - PMOS device type
        if vg[idx] < 0:
             type = -1   # pmos
        # return vg @ iref
        Vth = vg[idx]
        return Vth


Notice the use of Numpy arrays in the code above. The Numpy python module provides very convenient methods for processing array variables. (You'll never go back to PEL...) The zeros method creates a new Numpy array the length of the data ("len(id)") and initializes all values to 0.  Once the Numpy array is created and initialized, the flat method is used to iterate the 1D array while copying the id array values to the local nid array. The algorithm scales the constant current icon based on device geometry to calculate a reference current iref. Using this iref value, the index of the data point is returned which is closest to our target. This resulting index is used to return the value of the element of the vg array which is the Vth value.




You can quickly create reusable custom extractions or analysis routines using Python to start building your own modeling library. I hope this quick example of extracting gate threshold voltage will serve as a starting point for developing your own custom routines for use in IC-CAP. In follow on articles, I will demonstrate additional features of IC-CAP to streamline and customize your Python transforms using the IC-CAP's built-in user interface elements and TableVars to allow using parameter inputs in the Measure / Simulate tab to provide user-entered data to your Python transforms.


Related Links


Measuring Sub-Threshold MOSFET Characteristics Using a Quasi-Static I-V Method

How to Extract Threshold Voltage of MOSFETs

Python Programming Integration with IC-CAP

Negative Bias Temperature Instability (NBTI) refers to a positive shift in threshold voltage in CMOS devices, hastened by negative gate voltages and high temperatures.  Resulting in lower device currents and lower transconductances, NBTI presents a device reliability concern, especially as gate-oxides become thinner and as device geometries continue to become smaller.  Reliability engineers have tried to characterize this phenomenon by applying a series of biases to stress the device for increasing time intervals, while measuring device parameters such as gate threshold voltage (Vth) after each stress period. In this way, they will observe an accelerated lifetime of the part.  Due to a self-healing process known as recovery, the device can appear to partially return to its pre-stress state, causing the test results to often overestimate the lifetime of the device.  To compensate for NBTI recovery, engineers at X-FAB Semiconductor proposed a Recovery Correction Method (RCM) [1] when measuring NBTI induced threshold voltage degradation in high-K CMOS transistors. The RCM method could be an excellent alternative to using the more typical extrapolation of Vth degradation model data to estimate NBTI lifetime. With RCM, the effect of NBTI is modeled using a curve fitting technique to estimate the lifetime of the device, even in the presence of recovery. Thus, one could eliminate the need for expensive and specialized hardware setup and complicated triggering associated with popular fast-IV pulse NBTI systems [2]. 


Intrigued by the potential of RCM, I wanted to explore device recovery times using a quasi-static DC-IV measurement of the sub-threshold region. To properly measure the influence of delays between stress and measurement, I needed very accurate measurements for both p-channel and n-channel MOSFET devices. Shown in Figure 1 below, each quasi-static measurement will be nestled between stress events.  By varying the time between a stress event and a measurement, and further modifying the measurement times during the Vth measurement, we can explore the nature of the NBTI recovery more precisely.  


Figure 1. NBTI Stress-Measurement timing diagram. [4]


Quasi-static DC IV

I performed multiple measurements on p-channel devices while adjusting delay time and the step delay of the sweep as shown in Figure 2. This measurement method is commonly known as quasi-static DC IV


fig.1. Quasi-static Measurement

Figure 2. Quasi-Static Bias for Each Step of Vg During the Vth Measure Cycle in Figure 1.


Quasi-static measurements can more accurately characterize the energy levels of interface traps at the Si/SiO2 interface, commonly understood as the underlying mechanism for NBTI. It has numerous advantages over a standard curve tracer sweep.

  1. Multiple samples used for averaging, filtering out noise.
  2. Staircase sweep mode performed by series of high-speed single spot measurements.
  3. Ability to set current and power compliance during each measurement point during the voltage sweep.
  4. Ability to set a user defined ramp rate (dV/dt) of the voltage sweep.
    ( Sampling interval = delay + step delay = dt )


Low-voltage, sub-threshold measurements of small geometry MOSFETs are difficult to measure using conventional NBTI measurements. However, using Python, I was able to program Keysight’s E5270B Precision IV Analyzer with multiple high-resolution SMUs to perform accurate current measurements over swept applied voltages with varying source and measurement delays, to better characterize the recovery mechanism in these devices. 


Writing a Set of Custom Transforms in IC-CAP


The programming guide for the E5270B lists a quasi-static pulsed measurement mode built into the command set of the instrument. [5] That’s great; however, it requires a (stop - start) voltage > 10 V. Unfortunately, that would damage my devices, which have a maximum voltage rating of only +/- 3.3 V. I therefore determined that I needed to create my own custom quasi-static measurement routine by implementing a series of custom IC-CAP transforms in Python. Since I would likely switch to the Keysight B1500A Semiconductor Device Parameter Analyzer in the future, my solution must support diverse instrument choices. The specific instrument control commands may vary slightly from one instrument to another.


Leveraging the work I presented in my previous blog entitled "Using a Python VISA API within IC-CAP for Instrument Control", I'll present custom transforms for a quasi-static measurement of an Id vs. Vg sweep on a p-type MOSFET.

I hope you find this example helpful in developing your own application-specific measurements.




The complete IC-CAP model file py_new_api_basic_demo.mdl with the Python source code used to implement the quasi-static measurement is attached at the end of this post. I recommend saving this *.mdl to C:\Keysight\ICCAP_2018\examples\python


  1. Install IC-CAP 2018, under Windows 7 or 10 in the default installation directory; typically C:\Keysight\ICCAP_2018.
  2. Install the Keysight IO Libraries 17.x software. The visa32.dll and visa64.dll dynamic link libraries are located in the C:\Windows\system32 directory.
  3. Configure and confirm communication with your instruments using the 'Keysight Connection Expert' software.
  4. Install and configure your Python virtual environment, and define the appropriate IC-CAP environment variables. Please refer to my previous blog article Extending the Power of IC-CAP Software with Python -- PyVISA Control for a detailed explanation on creating Python virtual environments and loading external Python libraries. Change references to the virtual environment name icenv to icenv2018 (or a name of your choice..) and replace IC-CAP_2016_01 with IC-CAP_2018.
  5. Download the and scripts attached to this post.The utility described in my previous article "Using a Python VISA API within IC-CAP for Instrument Control" is used to manage communication with the instrument. The script called enables parsing and processing ASCII data retrieved from the instrument's data buffer.
  6. Confirm you have the environment variable ICCAP_USER_PYTHON_PATH defined in your Windows environment: 

    Tools> Programs> Advanced System Settings: Environment Variables. The location specified by this variable is added to the directories IC-CAP will search to find python scripts. (For an IC-CAP installation, the directory containing the 'factory' python files is typically: C:\Keysight\ICCAP_2018\iccap\lib\python).

  7. The and files should be placed in the directory specified by the variable ICCAP_USER_PYTHON_PATH. 

  8. Several Python module libraries are referenced in the _run transform to provide support for parsing arrays, writing CSV files and other functions. You will need to install these modules in the Python virtual environment using PIP (package manager for Python) .


The required Python modules include the following: 

  • pathlib2 - a backport of the new features in Python 3 for creating and managing file paths,
  • csv - a package for writing and reading comma separated values - already included in Python27
  • imp - a package for dynamically importing Python modules - already included in Python27


Activate and verify the Python 2.7 virtual environment by checking the system path 'sys.path' and system prefix 'sys.prefix.' To do this, open a Windows command shell and perform the following steps:


Activate the (icenv2018) virtual environment

C:\Users\username> workon icenv2018

(icenv) C:\Keysight\IC-CAP_2018\tools\win32_64>

Change the directory to virtual env (icenv)

C:\Users\username> cdvirtualenv

Check the Python interpreter version for (icenv2018)

(icenv) C:\Users\username\Envs\icenv> python -V

The version should return:

Python 2.7.13


Start the interactive Python interpreter for the virtual environment.

(icenv) C:\Users\username\Envs\icenv2018> python

You should see something like the following:

Python 2.7.13 (default, Mar 29 2017, 13:31:10) [MSC v.1900 64 bit (AMD64)] on win32

Type "help", "copyright", "credits" or "license" from more information.


Now, enter the following commands at the Python >>> interactive prompt:

>>> import sys 
>>> print sys.prefix

You should see something like the following:


Now type:

>>> print sys.path

You should see something like the following:


To exit the virtual Python interpreter type:

>>> quit()

(icenv) C:\Users\username\Envs\icenv2018>

Leave the virtual environment by typing:

(icenv) C:\Users\username\Envs\icenv2018> deactivate



This completes the prerequisites.Your icenv virtual Python environment is configured and ready to be used from IC-CAP. In the following section, I will provide a step-by-step guide on the construction and use of this example.


Load the IC-CAP Model File


Assuming you saved the model file to the examples folder (C:\Keysight\ICCAP_2018\examples\python), click 'File/Examples...' and select: python\py_api_new_basic_demo_5270.mdl. (The model file is attached at end of this post along with a version supporting the Agilent 4156 Semiconductor Parameter Analyzer.)




Before starting to write the code it is convenient to add some User variables to IC-CAP's Model Variables Table to aid in configuring the device parameters and measurement conditions.


Click on the 'Model Variables' Tab





Note the 'debug' variable defined in the 'Model Variables' Table.

Name            Value               Comment
debug           1                   Enable/disable global debug print statements

This enables the reporting of useful diagnostic information.


Select the idvg_quasi Setup, go to the 'Measure / Simulate' tab and observe the Inputs vd, vg, vb, and the Output id, defined to contain the data we will be acquiring from our transforms.



The vg Input has the Sweep Type defined to be Lin(linear). We will build an equivalent data vector for the vg Input using the _meas_iv transform.


Select the 'Setup Variables' tab under the setup idvg_quasi.

 idvg_quasi setup variables table


Notice the following variables defined in the idvg_quasi 'Setup Variables' Table.

Name            Value               Comment
drain           1                   Drain SMU Channel
gate            2                   Gate SMU Channel
source          3                   Source SMU Channel
substrate       4                   Substrate SMU Channel
interface       GPIB0:17::INSTR     VISA instrument
visaResponse                        VISA response string
error_status    32,48,128           Error codes
error_command   ERR?,EMG?,ERRX?     Command to process errors
hold_bias       0.0                 Bias applied during hold time period
hold            0.5                 Hold time before first measurement, in seconds
delay           0.1                 Delay time
step_delay      0.2                 Step delay time
vgstart         0.0                 Gate sweep start voltage
vgstop          3.0                 Gate sweep stop voltage
vgstep          0.1                 Gate step size
vgpts           31                  Gate points
igcompl         1E-1                Gate current compliance
vdvalue         3.0                 Drain voltage (constant)
idcompl         1E-1                Drain current compliance
vsvalue         0.0                 Source voltage (constant)
iscompl         1E-1                Source current compliance
vbvalue         0.0                 Bulk voltage (constant)
ibcompl         1E-1                Bulk current compliance


These set the measurement parameters that will be sent to the SMU.  You may need to change the SMU channel assignments ('drain', 'gate', 'source', 'substrate') to match the configuration of your instrument.  For example, your 'drain' (Drain SMU Channel) may be slot 5, not slot 1, etc.


In the 'Setup' named idvg_quasi, select the 'Extract/Optimize' tab. 


The following transforms are defined:

  1. _run - the main Transform that calls other Transforms and provides functions for processing the measurement data and writing data files.
  2. _init - reads values from the IC-CAP Setup Variable Table ("SVar") and initializes parameters for the measurement
  3. _setup_iv - sends commands to configure the instrument for upcoming measurement
  4. _meas_iv - sends commands to instrument to perform actual measurement, including channel specific ranging, bias application, compliance and measurement triggering
  5. _close - turns off biases, disconnects outputs, and closes the VISA session.


Note: The _run Transform contains code calling the '' script, which will activate the virtual python environment. Modify the path defined for the 'activate_this' variable, to the correct setting for the environment.


idvg_quasi setup _run transform


Notice the 'Function' definitions for the python transforms, _run, _init, etc. are set to 'PythonGlobal' Information, including the data and variables, will be shared in the global transform space. To perform the quasi-static DC measurement, select the _run transform from the 'Extract/Optimize' tab and click Execute


The _run will call the other transforms in the order needed. The resultant data can be plotted as shown in the 'ThreshholdVoltageIdsvsVgs' plot under the idvg_quasi Setup.


# Perform measurement
# open communications interface 
vl = visaOpenSession(intr)
if debug and vl: print "VISA resource: {} found".format(intr) 

# forward call additional transforms
if bOk: iccap.iccap_func("_init","execute")
if bOk: iccap.iccap_func("_setup_iv","execute")
if bOk: iccap.iccap_func("_meas_iv","execute") 

# zero channels and close GPIB interface
if bOk: iccap.iccap_func("_close","execute") 

if debug: print "_run - complete bOk: ", bOk


There are several necessary lines in the _run script that import the correct Python modules for use in the other transforms. The first two statements in the script below activate and execute the Python interpreter in the virtualenv named icenv2018 that was previously installed. (As mentioned earlier, the path to the '' script should be modified to be correct for the current user environment)

# # # Main execute file for IdVg measurement

activate_this = "/Users/<USERNAME>/Envs/icenv2018/Scripts/"
execfile(activate_this, dict(__file__=activate_this)) 
# imports
from iccap import icfuncs as f, SVar, MVar, get_dataset, set_dataset, Setup, TableVar
from pyvisawrapper import *
from numpy import *
import itertools
import pathlib2 as pl
import csv
import math
import time
import imp


The imp package has been added to aid in re-initializing our external modules while debugging.  IC-CAP imports these external modules only once when it starts the Python environment. If you make changes to the module code in an external editor, the changes will not be updated until the next time you start IC-CAP. To work around this issue you can use the imp.reload( ) function to reload the modules during execution of the _run transform.



# Global variables
pv = imp.reload(pv)    
dp = imp.reload(dp)    
from pyvisawrapper import *    
from dataparser import * 




Here we are setting some global variables by reading the Model and Setup Variable Table variables defined in an earlier step. Via this method, one can quickly change global values in the appropriate table, rather than needing to modify Python code in each transform individually. 


# defaults from the model variables table

# get debug enable/disble
debug = int(MVar("debug").get_val())   # enable debug print



The MVar command gets the values from the 'Model Variables' Table.  The get_val( ) function returns the value of the variable in the table, and assigns it to the specified local variable. I usually specify variables (and their values) in the Model Variable Table that apply to all Setups in the IC-CAP model file, which is the case here.


# get channels from setup variables table 
drnSMUChan = SVar("drain").get_val()
gateSMUChan = SVar("gate").get_val()
srcSMUChan = SVar("source").get_val()
subSMUChan = SVar("bulk").get_val() 

intr = SVar("interface").get_val()

rsp = SVar("visaResponse")
stat = SVar("error_status").get_val().split(",")
err = SVar("error_command").get_val().split(",")


The SVar command gets the values from the 'Setup Variables' Table. I usually specify values in the Setup Variables Table that apply to a particular Setup. This supports the case where you might want to have different channels defined for other measurements or even specify a different instrument in the 'interface' variable for a different measurement setup.



Open _init transform


The _init transform reads the Setup Variable table values and assigns them to local variables to be used later when updating parameters for the instrument commands.




The type or polarity (NMOS or PMOS) is read from the Model Variable Table. If its value is PMOS, the values for the gate and drain biases and compliance are multiplied by -1, which will provide negative bias to the device terminals.


# Initialize global variables and parameters for IdVg_Quasi

if debug: print "_init - enter: bOk =", bOk 

# add variables for sweep source and other variables
polarity = MVar("POLARITY").get_val() 

# get setup variables

if polarity == "PMOS":    
   vg_start *= -1    
   vg_stop *= -1    
   vg_step *= -1    
   ig_compl *= -1
if debug:
   print "vg start = {} vg stop = {} vg step = {}".format(vg_start, vg_stop, vg_step)

vg_points = int(SVar("vgpts").get_val().split('.')[0]) 

if polarity == "PMOS":    
   vd_value *= -1    
   id_compl *= -1

if debug: print "vd value = {}".format(vd_value) 


if polarity == "PMOS":    
   is_compl *= -1    
   ib_compl *= -1 

if debug: print "_init - exit:", bOk



Open _setup_iv transform


The _setup_iv transform sends commands to initialize the instrument and set specific features.




The FMT11 command sets the data return format to ASCII. We will discuss that in detail further below, when we look at how to parse the data returned from the instrument's data buffer. (See the E5270B Programming Manual for details)


# set data format to binary 4 bytes 
cmd = "FMT11"
if bOk: bOk = visaWrite(vl, cmd, 10000, stat, err) 



Open the _meas_iv transform


The _meas_iv transform performs the quasi-static measurement.




# perform quasi-spot sampling measurement with auto ranging 
for i in range(0, vg_points):    
   # calculate next voltage step    
   value = float(vg_start) + (float(vg_step)*i)     

   # append value to vvalue[] list    

   # set wait hold, delay to 0.0000 and step_delay will be handled by     
   cmd = "WT " + str(hold) + "," + str(delay) + "," + str(step_delay)    
   if bOk: bOk = visaWrite(vl, cmd, 10000, stat, err)     

   # set quasi-pulse parameters start = stop    
   cmd = "WV" + gateSMUChan + ",1,0," + str(value) + "," + str(value) + ",1," + str(ig_compl)    
   if bOk: bOk = visaWrite(vl, cmd, 10000, stat, err)     


   # trigger the measurement    
    cmd = "XE"    
    if bOk: bOk = visaWrite(vl, cmd, 10000, stat, err)     



For each iteration of the 'for' loop, the WT command sets the Hold, Delay and Step Delay time of the measurement as depicted in Figure 2 above. The Start and Stop value for the WV staircase sweep command is set to the same Vg value. This effectively performs a single point sweep at each specified Vg step. The XE command triggers the measurement. Once complete, the data value is retrieved from the instrument data buffer by calling the get_Measured_Data( ) function. (The get_Measured_Data() function is defined in the _run transform).


We previously created the global arrays vvalue[ ] and ivalue[ ] for storing our forced voltage and measured current data values.


# global list of values
vvalue = []
ivalue = [] 



The get_Measured_Data( ) function retrieves the data from the instrument data buffer and uses the  script to process the returned data packets.


# measurement complete so get the data     
if bOk: bOk = get_Measured_Data(i)


The data format for the E5270B is formatted based on the FMT command. This discussion assumes a FMT11 

command was sent to the instrument in the _setup_iv transform.


The ASCII data values are expected to be in returned in the following format: (FMT11 is 13 digits data with header)



   A: Status. One character.
   B: Channel number. One character.
   C: Data type. One character.
   D: Data. Twelve digits or 13 digits.


An example of the data returned from the instrument is  NAI+1.23684-E09.  


Within the _run transform, the get_Measured_Data() function calls get_ASCII_Data_Info( ) function, which uses dictionary utility functions to return a parsed data packet in ASCII format along with any error status.


The script makes use of nested Python dictionaries to decompose the ASCII data values character-by-character by checking each against the key for each section of the dictionary. This script also implements classes which provide custom assertions that can be checked during the parsing of the data, providing specific error detection and reporting using the IC-CAP python treat_error() function to display the errors. You can open this script in any text editor and check out the source code to get an idea of how it works.  You can also modify this script to process other data formats including ones that provide other types of preambles and data resolution.


# Decode data packet
def get_ASCII_Data_Info(data, verbose=False):    
   Get the ASCII data value for parsing.     

   This function parsing data values returned from the instrument. Nested    
   data dictionaries are used for processing each element of the data value    
   including tags appended to the data value to provide measurement status.      

      data:       Data value to be parsed.        
      verbose:    Boolean value to provide more information to the calling                     
                  program. In this case IC-CAP will fill message text for treat_error function.    
      bOk:        Boolean value to report the success or failure of the function execution.        
      data:       Data value passed from calling progam.        
      stat:       Measuremetn status for data value.        
      chan:       Measurement channel for data value.        
      type:       Measurement data type ( current or voltage )        
      sign:       Polarity of the data value.        
      value:      Real value of the data.     

   bOk = True     
   mstat   = data[0]    
   mchan   = data[1]    
   mtype   = data[2]    
   msign   = data[3]     
   value   = data[4:16]     
   # for k,s in data:    
   stat   = getFromDict(dataDict, ['A', mstat])    
   chan   = getFromDict(dataDict, ['B', mchan])    
   type   = getFromDict(dataDict, ['C', mtype])    
   sign   = getFromDict(dataDict, ['D', msign])    
   svalue = float(value)     

   # 199.9999E+99 is a bad data point then set bad data points to 9999.9999    
      bOk = checkValue(svalue)                            
   except DataError as inst:        
      if verbose: treat_error(inst, printit=True)        
      bOk = False    
      bOk = True     

   # check the sign and multiply by -1    
   if msign == '-':        
      svalue *= -1.0 
   # check for errors and if verbose is true then display them        
      bOk = checkDataIsValid(stat)    
   except MeasError as inst:        
      if verbose: treat_error(inst, printit=True)    
   bOk = True          
   return bOk, { 'data':data, 'stat':stat, 'chan':chan, 'type':type, 'sign':sign,

## end of


Each data packet processed by the get_Measured_Data( ) function is appended to the global vvalue[ ] and ivalue[ ] arrays. When all data has been measured and parsed, the global array values are copied into IC-CAP data structures using ('M', 11) format with a 'for' loop with range set to the number of points in the sweep. Once the data are copied into the appropriate IC-CAP data array structures, the data can be plotted. We can also call other functions to export the data and write the results to both IC-CAP MDM and CSV file formats.


# Build iccap measured data values
dI = Transform(setupName + "/id")
gV = Transform(setupName + "/vg") 

# create data dictionaries for I-V data
dsI = {    
   ('M','11'): [ ivalue[i] for i in range(vg_points) ], 
dsV = {    
   ('M','11'): [ vvalue[i] for i in range(vg_points) ], 

# set the dataset in data dictionaries set_dataset(dI.get_fullname(), dsI)
if debug: print "Id :", dI set_dataset(gV.get_fullname(), dsV)
if debug: print "Vg :", gV  # export measured data to iccap mdm file
if bOk: bOk = export_Measured_Data() 

# write test results to CSV file
if bOk: bOk = write_Results(vg_points)            



Open the Plots Tab


Click the Display Plot button to view the data.




The plot results are shown in the new plot window.



Open the _close transform


This transform sets all bias to zero volts and disconnects the SMU outputs.

# close GPIB0 
if (vl): visaClear(vl) 
if (vl): visaCloseSession(vl) 

if debug: print "_close - exit bOk: ",bOk


NOTE: It is important to close the current VISA session when the transform finishes so that subsequent executions will not cause errors to occur when trying to perform the visaOpenSession command.




This implementation of the quasi-static measurement as a series of IC-CAP transforms demonstrates the flexibility and data handling capabilities of IC-CAP.  Using IC-CAP along with extending the Python modules like the and modules that I included as attachments to this article you can easily implement custom measurement and extraction routines. In a future article I'll show you how to implement additional transforms for extracting parameters along with other the custom Python code for performing parameter extraction on the Id vs. Vg sweep data of the p-channel MOSFET. 




[1] Vincent King Soon Wong, Hong Seng Ng, Florinna Sim., "Influence of Measurement System on Negative Bias Temperature Instability Characterization: Fast BTI vs Conventional BTI vs Fast Wafer Level Reliability". Internataional Journal of Electronics and Communication Engineering, Vol: 10, No: 12, 2016

[2] Wong, V. K. S., Ng, H. S., & Sim, P. C. (2015, December). "Impact of NBTI Recovery, Measurement System and Testing Time on NBTI Lifetime Estimation". 2015 International Conference on Advanced Manufacturing and Industrial Application. Atlantis Press.

[3] A.E. Islam, E. N. Kumar, H. Das1, S. Purawat, V. Maheta, H. Aono, E. Murakami, S. Mahapatra, and M.A. Alam "Theory and Practice of On-the-fly and Ultra-fast VT Measurements for NBTI Degradation: Challenges and Opportunities". Published 2007 in 2007 IEEE International Electron Devices Meeting.

[4] Keysight Technologies Application Note B1500-6, "Accurate NBTI Characterization Using Timing-on-the-fly Sampling Mode", Dec 2017.

[5] Keysight E5270B Programming Guide.


Related Links


rajsodhi, co-author


Many of you already know that Keysight's IC-CAP software provides an open flexible architecture that supports many industry standard and proprietary models. It also provides drivers for a range of popular test instruments required to make characterization measurements for extracting device model parameters and performing optimizations. But did you know that you can customize your IC-CAP environment to tackle your own measurement challenges?


This might be very welcome news if you are working with cutting-edge devices and need more than the capabilities already provided by IC-CAP. For many of these devices, skirting the limits of today’s technology often means that the measurement capabilities required are a moving target. And that can be a costly and time-consuming proposition if you have to buy and integrate new software tools every time you need new functionality. Your ability to automate these advanced measurements may even mean the difference between the success or failure of your project.


What if you need to implement your own behavioral model in Verilog-A along with custom parameter extraction routines? What if you want to create new measurement routines for controlling an arbitrary waveform generator? What if you want to add a time-domain measurement capability using an oscilloscope to capture your device’s fast pulse response? 


I faced such a scenario in my work at nSpace Labs, where I'm developing custom models for memristors and adding advanced measurement routines using the Keysight B1500A Semiconductor Device Analyzer. This analyzer is configured with multiple high-resolution SMUs (Source Measurement Units) and an integrated B1530A WGFMU (Waveform Generator/Fast Measurement Unit) to apply pulsed and arbitrary waveforms to the memristor’s electrodes, while simultaneously performing Fast-IV measurements. I needed to communicate with the WGFMU via GPIB using a Keysight provided software library and API for the WGFMU, something that is not currently supported by IC-CAP.


To take advantage of the WGFMU capabilities, I decided to use the Python programming language, included in all recent versions of IC-CAP, and PyVISA—a Python module that enables control of all kinds of measurement devices independent of the interface (e.g., GPIB, RS-232, USB or LAN). Utilizing IC-CAP's integrated Python environment, I was able to extend the software’s built-in measurement capabilities by integrating the third-party libraries and Python modules I needed for my application. This enabled me to programmatically generate the waveforms using Python, and then send the appropriate commands to the WGFMU for pulsing and simultaneously making Fast-IV measurements on my devices.


It took some effort, but I figured out how to install the WGFMU library and PyVISA package within a virtual Python environment for use with Keysight IC-CAP 2016. Now, I'd like to share with you the procedure for using some free Python packages and modules to extend the capabilities of IC-CAP. Using the WGFMU measurement routines that I have developed in Python, I am now able to extract and optimize parameters for my memristor model and have the ability to more accurately simulate the incremental conductance change of the memristor when a series of pulses are applied. Having more accurate models and the accompanying time-based measurement data provide me with a better understanding of the performance of the memristor-based circuits that I am designing. For you personally, extending the capabilities of IC-CAP means you can realize a significant return on your investment in your IC-CAP software, because you can now customize your environment to tackle whatever measurement challenge you might face.


Back to Basics

Before I delve into how to add PyVISA to a virtual Python environment, let’s discuss a few of the basics. First and foremost, the reason this is even possible is because the authors of IC-CAP developed a link between Python and IC-CAP back in 2013. The link provided in the module significantly expanded the flexibility and extensibility of the IC-CAP platform. The most common modules for engineering and scientific programming in Python are also currently included in the IC-CAP 2016 Python environment:

  1. Numpy: A fundamental package for numerical analysis including math functions, arrays and matrix operations.
  2. SciPy: A package for scientific and engineering computations.
  3. Matplotlib: A 2D plotting package that outputs plots in multiple popular graphics formats.
  4. PySide: A library that can be used for implementing custom graphical user interfaces using Qt.





There are a few things you’ll need to do prior to undertaking the installation of the PyVISA package:

  • Install IC-CAP_2016_01 or later, under Windows 7 in the default installation directory, which is typically C:\Keysight\ICCAP_2016_01.
  • Install the Keysight IO Libraries 17.x software and configure it to use the VISA library visa32.dll. This dynamic link library will be installed in the C:\Windows\system32directory.
  • Configure and test communication with your instruments using the Keysight Connection Expert software.                  

If you are new to IC-CAP software or Keysight IO Libraries, you’ll first want to get up to speed by checking out the links at the end of this article. If you are new to Python programming, I suggest you read the “About Python” section and check out the links at the end of this article before attempting this configuration.


Why Configure a Virtual Python Environment?

Sometimes, adding an incompatible module to a Python environment can cause it to become corrupted. Since IC-CAP ships with its own Python environment, you’ll have to be careful, or risk having to reinstall IC-CAP if problems arise. One way to avoid this problem is to use a virtual Python environment that can be implemented using two Python packages,"virtualenv" and “virtualenvwrapper-win,” which are designed to make it easy for users to create and manage completely isolated Python environments on the same computer.


By installing a separate virtual Python environment in your own user directory, you avoid breaking the IC-CAP installed environment, especially when potentially installing modules not compatible with the Python version shipped with your software. If you later upgrade to a newer version of IC-CAP, or if you need to reinstall the software for any reason, you’ll avoid having to reinstall all your third-party Python packages, assuming you have a backup of your home directory. 


The steps I’ve outlined for installing and configuring a virtual Python environment will allow you to install any third-party Python packages you want to use with IC-CAP. Key to this process is the installation of a standalone Python interpreter that includes PIP, a package manager needed to install the virtualenv and virtualenvwrapper-win. Having a stand-alone system Python environment is also great for developing experimental Python scripts and debugging in programming tools outside of the IC-CAP environment.



The following is a high-level overview of the procedure:

  • Install the Python 2.7 system environment
  • Install the virtualenv and virtualenvwrapper-win modules using PIP
  • Create your virtual Python environment for use with IC-CAP
  • Verify your new virtual Python environment
  • Configure the project directory for easy access to IC-CAPs Python interpreter
  • Install the PyVISA package using PIP in the virtual Python environment
  • Take PyVISA for a test drive using the virtual Python environment console
  • Write a macro within IC-CAP to activate the visual Python environment and use PyVISA


Step-By-Step Process for Installing the PyVISA Package


Step 1: Install the Python 2.7 system environment

Install the latest stable Python 2.7 release, which is currently version 2.7.13. Download Python 2.7.13 for Windows 64-bit from Python 2.7 is used because Python 3.x is not currently available for IC-CAP. Choose the default installation location, which is “C:\Python27”.



Add the Python 2.7 directories to the Windows PATH environment variable. This may be done through the Environment variables in Windows under the Advancedtab in computer Advanced system settings in Computer properties.


NOTE: The username in the command prompt is the name of the current user logged in to your Windows 7 machine. This generic name is a place holder for the commands listed below and represent the current user's home directory. The commands you will need to type are displayed in green throughout this article.


Check your Python installation.


C:/Users/usernamepython –V

Python 2.7.13


Step 2: Install the virtualenv and virtualenvwrapper-win modules using PIP

To install virtualenv type:

C:> pip install virtualenv


This should install virtualenv.exe into the C:\Python27\Scripts directory


To install virtualenvwrapper-win type:

C:> pip install virtualenvwrapper-win


This should install a set of useful batch '.bat' files that wrap the virtualenv functions and make creating and

managing virtual Python environments easier. These files should be installed in the C:\Python27\Scripts directory.


Check your virtualenv installation:

C:> virtualenv –-version



Step 3: Create your virtual Python environment for use with IC-CAP

Create the virtual environment using the virtualenvwrapper-win provided batch file mkvirtualenv and name it icenv.

Type the following at the command prompt:


C:\Users\usernamemkvirtualenv -p C:\Keysight\ICCAP_2016_01\tools\win32_64\python.exe icenv


NOTE: The -p option allows you to specify the IC-CAP Python 2.7.3 default environment to create our

virtual Python environment. Virtualenv creates the \Envs\icenv directory and copies the specified Python

interpreter and default modules to your \Users\username directory. 


Assuming everything succeeds with no errors or warnings, then we should get the following text:


Running virtualenv with interpreter C:\Keysight\ICCAP_2016_01\tools\win32_64\python.exe

New python executable in C:\Users\username\Envs\icenv\Scripts\python.exe

Installing setuptools, pip, wheel...done.


NOTE: The previous step creates the directory 'C:\Users\username\Envs\icenv' and copies the Python default

environment from C:\Keysight\ICCAP_2016_01\tools\win32_64. The contents of this '\Envs\icenv' directory

will now be the default Python configuration for IC-CAP 2016.


Use the cdvirtualenv batch file to easily change the directory to the icenv virtual Python environment we just created.


(icenv) C:\Users\username> cdvirtualenv


The command prompt should change to the following:


(icenv) C:\Users\username\Envs\icenv >


NOTE: This is the activated state for the icenv virtual Python environment. The 'activate.bat' file was called

during the mkvirtualenv command, which makes the following changes: 1) Prepending the virtual

environment's path to the Windows 7 system PATH environment variable so that it will be the first Python

interpreter found when searching for the python.exe. 2) Modifies the shell property to display the (icenv), which

denotes the virtual environment that is currently active. If no virtual environment is activated, the system  Python

is active by default.


Step 4: Verify your new virtual Python environment

Verify the activated Python 2.7 environment by checking the system path 'sys.path' and system prefix 'sys.prefix'


(icenv) C:\Users\username\Envs\icenv> python -V

Python 2.7.3


Start the interactive Python interpreter for the virtual environment.


(icenv) C:\Users\username\Envs\icenv> python


      You should see something like the following:

Python 2.7.3 (default, Feb 1 2013, 15:22:31) [MSC v.1700 64 bit (AMD64)] on win32

Type "help", "copyright", "credits" or "license" from more information.



Now, enter the following commands at the Python interactive prompt:

>>> import sys

>>> print sys.prefix


>>> print sys.path

['', C:\\Users\<username>\Envs\\icenv\\Scripts\\', 



>>> quit()

(icenv) C:\Users\username\Envs\icenv>


To exit the icenv virtual environment and return to the system Python environment, type the following at the command prompt:


(icenv) C:\Users\username\Envs\icenv> deactivate



Start the interactive Python interpreter for the system Python


C:\Users\username> python


You should see something like the following:

Python 2.7.13 (v2.7.3:a06454b1afa1, Dec 17 2016, 20:54:40) [MSC v.1500 64 bit (AMD64)] on win32

Type "help", "copyright", "credits" or "license" from more information.



Now, enter the following commands at the Python interactive prompt:


>>> import sys

>>> print sys.prefix


>>> print sys.path

['','C:\\WINDOWS\\SYSTEM32\\', 'C:\\Python27\\DLLs',

'C:\\Python27\\lib', 'C:\\Python27\\lib\\plat-win',  'C:\\Python27\\lib\\lib-tk',

'C:\\Python27', 'C:\\Python27\\lib\\site- packages']

>>> quit()



To reactivate the icenv virtual environment, use the virtualenvwrapper batch file 'workon.bat' by typing:


C:\Users\username\Envs\icenv> workon icenv

(icenv) C:\Users\username\Envs\icenv>


Step 5: Configure the project directory for easy access to IC-CAP’s Python interpreter

Here, we will set the project directory for the icenv virtual environment to IC-CAP's '\tools\win32_64' directory. This makes it easier to execute the built-in Python interpreter and import the IC-CAP included modules and Python tools.

Now you will no longer have to type the full path to access these tools.


NOTE: Anything you install using PIP while in the icenv virtual environment will still be installed

in the C:\Users\username\Envs\icenv.


Set the project directory to the ICCAP_2016_01 default Python path by typing the following:


(icenv) C:\Users\username\Envs\icenv> setprojectdir C:\Keysight\ICCAP_2016_01\tools\win32_64


"C:\Keysight\ICCAP_2016_01\tools\win32_64" is now the project directory for virtualenv



"C:\Keysight\ICCAP_2016_01\tools\win32_64" added to



Check that the project directory is set properly.


(icenv) C:\Users\username\Envs\icenv> cdproject

(icenv) C:\Keysight\ICCAP_2016_01\tools\wind32_64>


Return to the virtual environment directory.


(icenv) C:\Keysight\ICCAP_2016_01\tools\wind32_64> cdvirtualenv

(icenv) C:\Users\username\Envs\icenv>


Step 6: Install the PyVISA package using PIP in the virtual Python environment

Install PyVISA 1.8 using PIP.


(icenv) C:\Users\username\Envs\icenv> pip install pyvisa


Check that PyVISA was installed correctly to your (icenv) virtual python environment.


(icenv) C:\Users\username> cd C:\Users\username\Envs\icenv\lib\site-packages

(icenv) C:\Users\username\Envs\icenv\lib\site-packages > dir


The directory listing should now include the, visa.pyc, [pyvisa], and [PyVISA-1.8.dist-info] folders.


Step 7: Take PyVISA for a test drive using the virtual Python environment console 

You should have already installed the VISA drivers for your interface, either GPIB or PXI, and configured the system to use the software. Perform a "Scan for Instruments" to automatically add the instruments on your system to the VISA resources. Then, start an interactive Python shell and enter the following commands:


       (icenv) C:\Users\<username>>\Envs\icenv> python


       >>> import sys

       >>> import visa

       >>> print sys.path

        ['',  C:\\Users\<username>\Envs\\icenv\\Scripts\\',















      >>> rm = visa.ResourceManager()

      >>> print rm

      Resource Manager of Visa Library at C:\Windows\system32\visa32.dll


      >>> print rm.list_resources()



NOTE: An instrument was found on interface GPIB0 at address 16. Now quit the Python session and deactivate the virtual Python environment.


     >>> quit()

     (icenv) C:\Users\username>\Envs\icenv> deactivate




Step 8: Write a macro within IC-CAP to activate the icenv environment and use PyVISA

Open the project \examples\demo_features\5x3_PYTHON_PROGRAMMING\1_py_api_demo.


  1. Select the Macros tab.                                                                                                                                                           
  2. Click the “New... button to create a new macro.                                                                                                               
  3. Enter the name _init_pyvisa.                                                                                                                                                                                                                                                                                                                                                                                                        
  4. Select the Python (Local Namespace) radio button for the Macro Type.                                                                                                                                                                                                                                                                           
  5. Enter the following Python code in the editor window.                                                                                                                                                                         


  6. In Line #1 make sure to use the path of your home directory (where you created your icenv virtual Python environment), in this case, the 'C\Users\username\Envs\icenv\Scripts\' path.

  7. The script changes the current system PATH to prepend the (icenv) virtual Python environment to the existing PATH environment variable. This makes it the first location searched by the Windows OS when attempting to load a module (i.e., visa). The path entry 'C:\Users\marendall\Envs\icenv\lib\site-packages' will also be prepended to the system PATH environment variable and will be made available to IC-CAP's Python environment.

  8. Line #2 contains the execfile() function, which is called to launch the script. You can view the contents of this file in your favorite text editor or standalone Python IDE.

  9. Line #5 is where we import the module functionality into our IC-CAP Python environment.

  10. Line #10 gets the default VISA resource manager, which for our system is the visa32.dll installed with the Keysight IO Libraries in the C:\Windows\system32 directory.

  11. Line #13 calls the list_resources() function in the visa32 DLL library to return the current system resources

    previously configured with Keysight Connection Expert. This function returns a list of all the configured

    resources for the system as a Python List.

  12. In line #15 we print the result of the open_resource('GPIB0::16::INSTR') function, which should just return the     string 'GPIB Instrument at GPIB0::16::INSTR' if there are no errors.

  13. Line #17 closes the current communication session.


NOTE:  In practice you’ll want to code the statement in line #15 to be something like the following:

sl = rm.open_resource(r), where r is the resource string ('GPIB0::16::INSTR') and sl points to the object of the

opened VISA resource.


You can use call functions on this object by typing something like:

sl.write( cmd, termination='\r'), where cmd = "*RST" with the termination='r' being the carriage-return termination character to append to the end of the command string. This command will perform a GPIB reset on the instrument.


You can also use other available visa functions listed in the PyVISA docs, like sending: 

gpib_response = '\r') to read the response from the instrument's ouput buffer.


In a follow-on article I’ll show you how to create a PyVISA wrapper to simplify programming using these common

functions, but we’ll also be writing helper functions to check for instrument errors and display messages to the user.


NOTE: You should always close the VISA session when you are done with a resource. Not properly closing the session

will cause errors if you attempt to re-open the same resource later.                      


Step 9: Save and execute the macro within IC-CAP

Save the macro in the model file \Users\username\iccap\python\examples\1_py_api_demo.mdl or some other

suitable directory in your home directory.


  1. Click the Save button on the main toolbar, or select File->Save As from the main menu.        

  2. Select the macro _init_pyvisa from the Select Macro list.   

  3. Click the Execute button.                                                                                                                                                                                                                     

  4. Check the results of the script execution in the IC-CAP Status Window.                                                                             


The full content of the status window should read:















Resource Manager of Visa Library at C:\Windows\system32\visa32.dll


GPIBInstrument at GPIB0::16::INSTR


The Bottom Line

If you completed all of these steps successfully, you should now be able access the full capabilities of PyVISA from IC-CAP 2016. That means you can create transforms for instrument control and data acquisition over any supported interface.


Hopefully this information will be beneficial to those wanting to customize their IC-CAP 2016 installation to take full advantage of the many powerful Python packages available for download, or to write their own custom Python/PyVISA measurement routines. This method can also be used to install additional virtual Python environments for use with other Keysight products like WaferPro Express 2016. In a future blog post, I’ll outline the steps to do just that. In the meantime, for more information on IC-CAP or Keysight IO Libraries, go to and, respectively.



About Python

If you are new to Python programming, here’s some information to help you follow the steps in this blog.  

  • Python is an"interpreted" language, which means it generally executes commands typed by the user in an interactive command shell. This is convenient for testing program statements to learn the Python syntax. However, a more common means of writing a Python program is to create a Python script file with the '.py' extension. Say you created an example program and save it as '' To run the program, you simply type 'python' at the command shell prompt.
  • Python scripts, which are often called modules, can also be used for creating libraries of functionality, and are distributed along with program resources in packages.
  • Packages can be installed and combined with user-generated code to extend a program's functionality.  
  • PIP is the Python package installer that integrates with PyPI.orgthe Python Package Index. It is a repository of numerous free Python applications, utilities and libraries. PIP allows you to download and install packages from the package index without manually downloading, uncompressing and installing the package via the command 'python install'. PIP also checks for package dependencies and automatically downloads and installs those as well. 
  • An environment is a folder (directory) that contains everything a Python project (application) needs to run in an organized, isolated manner. When its initiated, it automatically comes with its own Python interpretera copy of the one used to create italongside its very own PIP. 



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2. ADS simplifies the use of S-parameter files for your parts

Imagine you’ve just downloaded an S-parameter file for a part you are considering; in this case, a high-speed connector for a backplane. It has a large number of ports on it, so you want to first inspect the quality of the data and then use it in your simulation. How do you wire it up? Which ports are paired?

Traditionally, the answer might be to open up the data in a text editor. However, with ADS’s S-Parameter Checker, designers can now easily view the contents of any S-parameter file without having to setup an S-parameter test bench simulation. This allows them to directly plot the individual relations they wish to see, and shows them the port names against each pin. It also tells designers if the file is passive or reciprocal, as well as the number of data points in the file and the frequency range it covers. Designers can even use S-Parameter Checker to rename, re-order and reduce the number of ports, which enables them to save a new, more usable S-parameter file (Figure 2).



Figure 2. The S-Parameter Checker allows design engineers to easily rename, re-order and reduce the number of ports.


3. ADS provides access to industry-leading channel simulator technology

ADS's channel simulator technology sprung forth in 2009 when transient simulation (SPICE) couldn’t address the measurement of margin-to-mask for really low bit-error-rates (BER), as demanded by high-speed link designs.

Dr. Fangyi Rao's 2006 patent to correct for passivity, while ensuring causality, ensured ADS to be regarded as the msot accurate solution for handling cascades of S-parameter models combined with circuit models in one schematic. The pace of innovation continues today with ADS's Channel Simulator still the industry-standard model. Additionally, the Channel Simulator now supports IBIS package (.pkg) entries directly and more extensively before.


Figure 3. With ADS, designers can mix-and-match models from IBIS, IBIS-AMI, SPICE, and generic built-in models.


4. ADS stays ahead of technology waves (such as PAM-4)

Market pressures on IP routers set an expectation to do more at a lower cost per bit. However, to go faster and provide a single 100-Gbps electrical lane across the distance of a typical backpane is beyond present day technology. 

The solution lies in Pulsed-Amplitude Modulation (PAM) for high speed serial links. PAM represents a revolutionary step in the industry, but comes with its own unique set of challenges as well. For example, we can transmit a PAM-4 symbol at 28 Gbaud and deliver 56 Gbps at the other end, but the IC's use more power and the signal itself has a reduced Signal-to-Noise ratio (SNR). 

Whether you are challenged with managing complexity while reducing production cost, or researching how to go further and faster on low-loss materials and fabrication processes,


 Figure 4. ADS supports PAM-4 simulations, which offers a viable alternative to NRZ. 



5. ADS accelerates DDR4 simulation methodologies

In simulations, how do you check compliance against the mask? Keysight EDA offers a novel DDR Bus simulator specifically designed to accomplish this task. It is a bit-by-bit channel simulator for parallel buses. It characterizes all transmitter paths at once, and calculates the BER contours for each eye at the receive side, together with the measurements for margin to mask. 

The simulator is unique in that it correctly handles the asymmetric rise and falling edges found with single-ended signals.The Tx and Rx models can be used to drive IBIS models, or mixed with SPICE models. The speed of the simulator allows it to be used in place to transient simulation for many pre-layout tasks, where the designer wants to sweep multiple parameters, or investigate performance movements. Together with batch simulation, it is a powerful tool for pre-layout design exploration, as well as post-layout verification for compliance.


Figure 5. Keysight EEsof EDA's DDR Bus simulator is a bit-by-bit channel simulator for parallel buses.


6. ADS puts power in the hands of designers

Power Integrity has become an ever-increasing challenge in modern day high-speed systems, driven by three main forces: higher device integration, lower IC supply voltages, and smaller real estate on the PCB. These modern challenges have forced engineers out of their notebooks and into true PI-DC simulators in order to take into account the real physical layout of the power delivery network (PDN). 

With ADS and the new PIPro suite of EM simulators, designers receive visual feedback in just second on exactly what the voltage distribution looks like for the selected power and ground nets. ADS also allows designers to check the current flow through individual vias and the voltage and current at specific locations like individual pins on the sinks and voltage regulator module (VRM). This information is easily reported in a sortable table. Vias that carry too much current can be highlighted in the layout for easy identification (Figure 6).


Figure 6. Vias carrying too much current can be highlighted in the layout for easy identification.


7. ADS enables flat PDN impedance responses

Once the initial pre-layout design has been created, the first-pass of the PCB layout can be imported into ADS 2016 for analysis using PIPro EM technology. PIPro’s net-driven user interface allows designers to quickly select the power and ground nets for the PDN network they want to simulate, choose simulation models for each of the components (e.g., decaps, EMI filters, inductors, and resistors, etc.), and setup the PI-AC simulator to compute the PDN impedance of the distributed layout with components in place. 

Since the PI-AC simulator has EM technology designed specifically for this purpose, a very accurate result is returned in minutes, not days. Designers can then use ADS 2016’s field visualization, PDN impedance and S-parameter plotting to determine if there are problems with the current PDN design, and to check coupling from one capacitor to the next. With just one click, a schematic representation is generated to transfer the EM-characterized model, together with circuit models of the components.  This back-annotation to an ADS Schematic enables  one smooth cohesive workflow. Designers can then apply their behavioral VRM model, and further tune the decaps for final verification/optimization.


Figure 7. Increasing the decoupling capacitance while increasing ESR improves impedance response flatness.


8. ADS enables electro-thermal simulation

As power delivery networks are forced into tighter PCB real-estate, the power plane becomes far from idealized.  Usually the once perfect plane is perforated heavily with clearance holes from stitching vias, and it can be a struggle for the layout engineer to get the required current up into the package of the device that requires it, without passing through narrow traces of metal.  Calculating an accurate IR-Drop is important for the PI designer, but also knowing the absolute temperature that the PDN traces, vias and chip die will reach, is invaluable information.   High temperatures can cause reliability issues; as the temperature cycles from on/off states can cause the via barrels to weaken and crack over time.

It is not intuitive to the designer whether a via is undersized for the current that is passing through it.  The temperature rise is very dependent on the width of the traces attached to it.  Secondly, resistance of a trace increases with temperature, requiring simulation analyses to determine the final steady state condition.  For every 10 degC change in temperature we see a 4% change in resistance of a trace. These observations point to a need to simulate the PDN design with a DC IR Drop electro-thermal solution.    

ADS provides a fully-automated integrated Electrical-Thermal-Electrical iterative simulation.  Users receive the most accurate representation of DC IR Drop results by taking into account local resistivity changes due to heating. The additional Thermal-only simulation, gives the user the ability to perform thermal floor planning.

With ADS you can easily copy existing DC IR Drop simulation setup to new Electro-Thermal simulation and visualize a list the temperature of planes, pins and vias.


Figure 8. DC IR Drop Electro-Thermal analysis - visualization of temperature.


9. ADS has an interconnect toolbox (Via Designer and CILD)

The signal integrity design challenge is not just to successfully recover the transmitter signal at the receiver, but to understand what is controlling the performance.  What are the significant margin eaters and which ones can I optimize?

Typical connections between a transmitter and a receiver include some section of application specific custom PCB routing.  ADS has a signal integrity tool box to help explore the design trade-offs and deal with the complex interaction between stack-up, transmission line losses, and via topology.

Designing the PCB interconnect starts with some sort of PCB stack-up definition in order to start evaluating the different types of possible transmission line topologies.  Once the transmission lines are optimized for impedance and losses, then one needs to look at via performance to transition between layers. Anyone of these steps has cost and performance trade-offs that can impact the other, resulting in a complex inter-relationship to determine which feature is the real margin eater:  Layer Count, Line Z, Via Backdrills, Material, Layout Density, etc.

ADS provides an Interconnect Tool Box that includes Substrate Editor, Controlled Impedance Line Designer, and Via Designer to simplify the pre-layout PCB interconnect investigation.

Figure 9. This type of pre-layout investigation enables an engineer to understand what is controlling the design margins and make informed cost vs. performance decisions.


10. ADS embodies the Keysight philosophy:

Hardware + Software + People = Insights

With Keysight's greater software-centric solutions focus, Keysight EEsof EDA plays a leading role in virtual compliance testing. Through Compliance Test Benches in ADS, designers can now take ADS simulated waveforms and test them against the same gold suite of compliance tests used on the bench with final verification hardware to attain the utmost confidence in a designs's compliance.

Further bolstering these capabilities in ADS is the support Keysight EDA offers its customers. That support includes a world-wide technical support presence, expert Application Engineers and consultative Field Sales Engineers. This support, together with Keysight’s hardware and software solutions and technical expertise gives customers greater insight and in turn, greater chance of success.



Keysight ADS further cements its leading position in electronic design software with continued advances for circuit simulation, layout and layout verification, silicon RFIC, and just as critically, signal and power integrity.


Welcome to Tim’s Blackboard! This is the place to find discussions on interesting topics related to signal integrity and power integrity. Find other cool posts here!


Last time on Tim’s Blackboard, we talked about linear Feed-Forward Equalization (FFE). This week, we will discuss the nonlinear Decision Feedback Equalization (DFE).


All the ADS content shown is in the attached workspace. Make sure you download the attached workspace and apply for a free trial to apply DFE to your own channel!



When I first learned about decision feedback equalization, one of the bullet points is, “it is a nonlinear equalizer”, but I never knew why. Today, I will answer the question:

What makes DFE a nonlinear equalizer? 

Decision Feedback Equalization Technique

Shown in Fig. 1, decision feedback equalizer (DFE) can open a closed eye. Nonetheless, the signature of an opened DFE eye is different than other equalizations. There are kinks in the eye diagram. To examine the eye diagram a little closer, we apply single pulse analysis to look at the blink of an eye.


Fig. 1: Keysight ADS channel simulation demonstrating Decision Feedback Equalization (DFE) with different number of taps. DFE exhibits kinks in the eye.


Just like the eye diagram, we expect the single pulse response after decision feedback equalization to also have kinks. Sure enough, in Fig. 2, we see the kinks in the equalized single pulse response.


Fig. 2: Equalized single pulse response shows how DFE corrects post-cursor ISI on a single pulse that has all 0’s but a single 1. DFE inserts negative amplitudes after the received “1” pulse to better detect the next 0.


Taking a closer look, one observes that since the single pulse has all 0’s but a single 1 in Fig. 2, as soon as DFE algorithm sees a 1, it tries to reduce inter-symbol interference (ISI) by adding negative amplitudes so that the following low voltage is lower, allowing better detection of the next 0.


By the same token, when we send a single pulse that has all 1’s but a single 0, we should expect that as soon as the algorithm sees a 0, it tries to reduce ISI by adding positive amplitudes, allowing better detection of the next 1.


Fig. 3: Equalized single pulse response shows how DFE corrects post-cursor ISI on a single pulse that has all 1’s but a single 0. DFE inserts positive amplitudes after the received “0” pulse to better detect the next 1.


Result shown in Fig. 3 is consistent with our expectation. DFE algorithm is reducing ISI based on the detected data (symbol).


Fig. 4: Comparison between received waveform and equalized waveform shows how DFE acts on the received waveform.  


By comparing the received waveform and waveform after DFE, as seen in Fig. 4, we can further see the action of DFE algorithm, but the question remains:

What makes DFE a nonlinear equalizer?

Symbol Detection and Decision: A Nonlinear Filter

At the arrival of received data (symbols), DFE algorithm detects and makes a decision. Assuming the decision is correct, proper tap values are chosen and feedback to the originally received data.   


Fig. 5: An example of a symbol detector. Because the output does not scale linearly with the input, a symbol detector is nonlinear.  


Shown in Fig. 5 is a symbol detection processing block. As the input doubles from 0.6 V to 1.2 V, the output does not double. Consequently, symbol detection is nonlinear. In turn, decision feedback equalization is also nonlinear.

But how do we make sure the detection is correct?

Fig. 6 is an illustration of DFE block diagram. The received symbol first undergo feedforward equalization so that the symbol detector can make the correct decisions. After the symbol detector makes a decision, the result goes through a feedback filter to be combined with the previously detected symbol.  


Fig. 6: Decision Feedback Equalizer (DFE) block diagram. A feedforward filter is at the front end of DFE to help the symbol detector make a correct decision. Each decision then goes through feedback filter to be combined with previous symbol.


Because the input to the feedback filter consists of the sequence of decisions from previously detected symbols, which it uses to remove the portion of the ISI caused by those symbols, DFE only removes post-cursor ISI. Moreover, since DFE assumes that past symbol decisions are correct. Incorrect decisions from the symbol detector corrupt the filtering of the feedback loop. As a result, the inclusion of the feedforward filter on the front end is crucial in minimizing the probability of error [1].


Realization of Decision Feedback Equalization

Given the basic algorithm of DFE, I decided to design my own DFE, see Fig. 7.


Fig. 7: Demonstration of a homemade DFE in Keysight ADS. See attached workspace for detail.


Knowing the input sequence is going to be a single “1” pulse, i.e. all 0's but and single 1, I first changed the feedback filter coefficients, V_tap1 and V_tap2, until the post-cursor ISI is reduced enough. Then, I adjusted the delay of the two taps so the corrections take place at the right time. When all was said and done, I had created a homemade 2-tap DFE. Fig. 8 shows the equalized single pulse response.


Fig. 8: Applying homemade 2-tap DFE to a single pulse.


In the process of creating a homemade DFE, I learned that DFE algorithm is not trivial. It requires many moving pieces to align. Besides the correct symbol detection, the timing and feedback filter coefficients (tap values) also need to be appropriately selected for different channels.


Fig. 9: DFE algorithm is readily available in Keysight ADS channel simulation. There are several adaptive algorithms to choose from.


Good news! To help expedite the simulating and testing process, DFE algorithms are implemented and readily available in ADS. ADS helps you test the amount of stress your channel can handle with DFE and adaptive DFE enabled, see Fig. 9. 


Summary of Equalizations

After today, we have talked about all three equalizations,

·        Continuous Time Linear Equalization (CTLE),

·        Feed Forward Equalization (FFE),

·        Decision Feedback Equalization (DFE).


Below is a summary of the equalizations.

Table 1: Summary of Equalization Techniques 


Each of the equalizations has its own personality. While CTLE is sitting in the analog world, operating in the frequency domain, in the digital realm, FFE and DFE are working comfortably in the time domain.


Of course, each personality has its strength and weakness, and so does each equalization. In the near future, I will examine the pros and cons of equalization techniques. Make sure you bookmark the blog and check back regularly.    


For the upcoming post, I will take a step back and ask the question:

What is Signal Integrity? 

Until next time, make sure you download the attached workspace and apply for a free trial to apply DFE to your own channel!



[1]       S. H. Hall, Advanced signal integrity for high-speed digital designs. 2009.



What is PathWave?

Posted by kaelly_farnham Employee Feb 14, 2018

PathWave is the new design and test software platform from Keysight Technologies. It combines design software, instrument control, and application-specific test software in an open development environment.


PathWave was the big news that Keysight unveiled at DesignCon at the beginning of February 2018.


PathWave at DesignConPathWave design and test software platform

PathWave signs were all over the DesignCon floor and meeting rooms. PathWave is an open, scalable, and predictive software platform that integrates hardware and software at every stage in the product development workflow. The PathWave software platform provides you with flexible and immediate access to the design and test tools you need, when you need them. 


Kaelly delivers flash seminar at DesignCon


At the show, I delivered a Flash Seminar about PathWave that was standing room only. Customers were very excited to hear how this new platform will affect them. It will help all engineers who work in design and test save time by connecting and integrating their workflows.


How does PathWave save me time? This was the most common question I got from engineers at the show.


The PathWave platform is built on a software framework that will connect all software and hardware in design, test, measurement, and analysis. On top of the framework, PathWave offers plug-ins and applications, enabling engineers to customize the environment for their specific tasks. It’s the customization combined with the interoperability provided by the common framework that allows for the most time savings. Below is an example.



PathWave Semiconductor Manufacturer Example

PathWave will connect and integrate the entire design and test workflow as shown in this example of a test setup for a semiconductor manufacturer.


PathWave can be customized for many applications, and above is just one example of a semiconductor manufacturer who needs to save test time because they are missing production targets. This customer struggled because they had a growing number of test parameters, were spending too much money on separate software test modules, and had a complex architecture that wasn’t easy to develop in, visualize data flows, or debug.  


With Keysight PathWave, their entire workflow will be connected and integrated with one single platform.  If desired, they’ll automatically get updates for all new releases of the software. They can save even more test time by pushing all the computations to the cloud or a local cloud. They’ll be able to connect to 3rd party hardware, so they can connect to existing equipment they already have. They can choose a software environment that includes a lightweight sequencer, plugin templates, package manager as well as development GUI, results and timing analyzers for best test team collaboration and efficiencies.  They can rely on consistent measurements from early validation to final manufacturing. 


And with Analytics as a big part of PathWave, they will be able to gather, store, and perform analytics on their test equipment and manufacturing data, improving productivity and asset utilization with the built-in predictive algorithms.


This is just one example of how PathWave is saving engineers time. For more information, check out PathWave online or contact Keysight.

Phased Array Systems have been around for decades, mostly confined to the aerospace industry; but with 5G development underway, phased arrays are becoming more common and in demand. In order to successfully design and deploy a product the first time, engineers should know how to avoid costly mistakes by using new techniques and simulation methodologies.


Mistake 1: Not predicting the far field spurious emissions in the simulation.

Whether you have an Aerospace/Defense or a commercial communications system, it must pass the test of a spurious emission mask (SEM). The masks are specific to each application, but the requirement remains the same. In the case of phased array, due to the added spatial dimension, the SEM test is more elaborate and is conducted in an anechoic chamber. The SEM test is conducted over the entire sphere (4π solid angle) for all the desired beam directions in both azimuth and elevation.


This very laborious procedure will be repeated if the spurious emissions are found the first time in the chamber and then have to be corrected in the design and brought back to the chamber. Therefore, if one can predict them upfront in the design cycle, the time spent in the anechoic chamber can be greatly reduced.


Figure 1. Predicting the desired beam directions up front in the design cycle, the time spent in the anechoic chamber can be greatly reduced.


This video goes into detail about how these spurious emissions can be predicted.


Mistake 2: Failing to explore the design thoroughly in the simulation phase.

Why would anybody not explore the design and simulation space?  There can be many reasons, but most likely it's due to the simulation speed and the accuracy of the modeling tool. One troubling behavior of phased arrays is coupling between the elements. The cost of a phased array is directly proportional to the size of the array. It is tempting to reduce the inter-element spacing, but unfortunately, that leads to increased coupling between the elements.


The coupling can happen in a few ways. If the lines in the feed network are close, they get coupled. An element not only transmits but can also potentially receive the energy from the adjacent radiating elements. This appears as the reflected energy back into the element’s input.


A third mechanism can also happen; if the elements are realized on the same substrate, higher order surface modes can be excited, propagated, and ultimately radiated. All these effects might cause loss of directivity in certain directions called blind angles. Unless one models the coupling effects and impedance mismatches accurately and explores the design over all the scan angles, these blind spots cannot be uncovered. A typical simulation shows a mild form of loss of directivity shown in the figure below.


Figure 2. Antenna coupling can cause loss of directivity in certain directions, called blind angles.


Mistake 3: Relying on simple spreadsheet calculations.

It is very popular to use spreadsheets to design RF systems. While it is true that they are readily available and quick to simulate, spreadsheets lack the capability to model and simulate. They cannot model multi-ports, RF mismatches, finite isolation, frequency response, accurate non-linearity, collated or uncollated noise, etc.


These common limitations become severe limitations when you start designing phased arrays. You need insights into all the paths, and phased arrays can have up to 400. You need to look into all the 400 paths to understand the behavior; because in a phased array, you cannot simulate one page and scale it up to 400 paths. You need to consider all of them simultaneously to achieve accurate results.


Figure 3. Phased array system design is much more complex than a single path RF system design. Designers cannot scale up the analysis of a single RF path analysis to a full array.


Under certain conditions, the amplifiers in the array are compressed. Due to this compression, the spurious radiation is violating the SEM as shown in the figure below.


Figure 4. SystemVue helps designers catch spurious radiation that violates the spurious emission mask, and can identify which amplifiers are driven into compression or saturation.


That's because some of the amplifiers in some of the chains are being driven into compression or even saturation. So how do you identify these amplifiers? Modern tools, such as SystemVue, make it easy to identify them and understand where the non-linearity is coming from.



Modern design simulation and modeling technologies will make it easy for engineers to avoid these costly mistakes. Watch Keysight’s latest video, How to Avoid Costly Mistakes in Designing Phased Array Systems, to receive greater insights on how to work around these common errors and download the workspace he uses in the video.




 Start your free trial of SystemVue today!






ICCAP - External Simulator interface


IC-CAP is a tool that enables modeling engineers to extract device model parameters using the simulator of their choice. For each model parameter extraction, measured data is compared against simulated data, and parameters are optimized to achieve the closest fit to the measured data. Because different simulators may use different syntax or "templates," adding a new simulator that is not supported requires its output to be adapted to one of these templates. For example LTSpiceIV uses a syntax that is very similar to SPICE3. IC-CAP supports the following simulator syntax:

  • SPICE2
  • Eldo
  • SPECTRE443
  • spicemodeads
  • SmartSpice
  • spmodeads
  • Saber
  • hpeesofsim (native ADS syntax)
  • spmodeads (Spectre syntax)
  • hspicemodeads (Hspice syntax)


To make a link between IC-CAP and some external simulator, one must edit the config file $ICCAP_ROOT/iccap/lib/usersimulators.



In this config file, every line represents instructions on how to connect a different simulator to IC-CAP. The format is presented as follows:

simulator_name template_name path_name host_name pipe_capability

If the hostname is blank (or ""), then we assume the simulation will run on the same computer as IC-CAP. Some example entries are shown in the usersimulators file below.

usersimulators example file

Note: Lines with leading # sign are comments.


To link to an external simulator, the steps are as follows:

  1. Install the simulator program, making note of where the binary executable file resides. Also, verify that you have a valid license.
  2. Append or edit the entry in the $ICCAP_ROOT/iccap/lib/usersimulators config file for the external simulator in question.
  3. Re-start IC-CAP.
  4. In the model file where the simulator is to be used, specify the SIMULATOR variable to that simulator's name defined in the usersimulators file.



Should you encounter any problem, please try the following procedure, as it will usually allow you to figure out the problem. If that doesn't work, simply collect information from the steps in this procedure, as well as any pop-up error messages, and send it to the IC-CAP support team.

  1. Turn on IC-CAP's Status window, and check to see if any warning or error message appears.
    Illustration on how to bring up status window.

  2. Further, turn on the Simulation Debugger window. Check the netlist created by IC-CAP and the simulator's output files.
    how to get simulation debugger from IC-CAP

Note: Once the problem is addressed, it's recommended that you close the Simulation Debugger window. Leaving it open will slow down the overall simulation speed due to additional input/output interaction.


Using this process, you can quickly and easily link IC-CAP to a supported external simulator.



Welcome to Tim’s Blackboard! This is the place to find discussion on topics related to signal integrity and power integrity. Find other cool posts here!



Last time on Tim’s Blackboard, I talked about Continuous-Time Linear Equalization (CTLE). This week, I will take things to discrete-time and discuss Feed-Forward Equalization (FFE).


All the ADS content shown is in the attached workspace.

Make sure you apply for a free ADS trial and download the attached workspace to apply FFE to your own channel!


FFE Opens Closed Eyes

Illustrated in Fig. 1, Feed-Forward Equalization (FFE) can open a closed eye. However, unlike Continuous-Time Linear Equalization (CTLE), where the equalization is done with analog components in continuous-time, FFE happens digitally in discrete-time.  

Fig. 1: A statistical channel simulation in Keysight ADS to demonstrate Feed-Forward Equalization (FFE) opening a closed eye.


Today, we will take a closer look at Feed-Forward Equalization and how it opens closed eyes for us.


Concept of Feed-Forward Equalization Technique

In the time domain, FFE creates a pre-distorted pulse at the transmitter by combining delayed pulses multiplied by different weights. By choosing the correct weights to multiply each delayed pulse, one reduces the overall Inter-Symbol Interference (ISI) and opens the eye.


Knowing how the frequency-dependent loss of a channel spreads out the single pulse response, FFE generates a channel-specific pre-distorted pulse at the transmitter to compensate for the spread. An example FFE pulse is shown in Fig. 2.


Fig. 2: The overlay of FFE pulse to be transmitted and channel single pulse response shows FFE inserts pulses of negative amplitudes around the main pulse to cancel out positive amplitude ISI. 


Transmitted, the FFE pulse travels down the channel. As the positive main pulse spreads, the negative amplitudes surrounding the main pulse “cancel” out the spreading.


Fig. 3: The equalized single pulse is more contained because FFE reduces the ISI spreading.


Shown in Fig. 3 is the single pulse response of Wild River Technology’s 10-inch stripline channel before and after FFE. Compared to the original channel single pulse response, the equalized single pulse response shows reduced ISI.   

How does one generate the pre-distorted pulses?

Realization of Feed-Forward Equalization

Demonstrated in Fig. 4 is the transmitter architecture of FFE. Mathematically, the structure of FFE is identical to finite impulse response (FIR) filter, where a signal goes through delay elements, and each delayed signal is multiplied by a coefficient of different weight. The important difference is the coefficients.

Fig. 4: An animation of FFE generating a pre-distorted pulse at the transmitter.


We refer to the delay element as tap spacing, and one tap spacing is usually one Unit-Interval. The weighting coefficients are known as tap weights, or just taps.


The “cursor tap”, C0, has the largest magnitude of all the taps and is the main contributor of the entire FFE pulse. The subscript of each tap, then, indicates the location of the taps relative to the cursor tap. For example, the tap, C-1, is one tap spacing before the cursor tap. We further use the term pre-cursor taps to group the taps before the cursor tap, and post-cursor taps for the ones after.


One can also apply the cursor categorization to a channel single pulse response. Fig. 5 is an example of a channel single pulse response with corresponding pre- and post- cursors.



Fig. 5: Application of cursor categorization to channel single pulse response. The cursor is the point where maximum amplitude occurs. Before the cursor are the pre-cursors, and after, post-cursors.   


Marking the channel single pulse response sheds different light on our understanding of the channel. Shown in Fig. 6 are single pulse responses of a simulated lossless channel and a lossy one.


Fig. 6: Comparison between a simulated lossless channel and simulated lossy channel reveals more post-cursor ISI than pre-cursor.


One observes frequency-dependent loss of the channel causes ISI in the pre-cursor and post-cursor. Moreover, for the simulated channel in Fig. 6, there exists more post-cursor ISI than pre-cursor. Consequently, in this case, our selection of the tap values would focus on correcting post-cursor ISI.


In practice, user informs FFE algorithm how many pre-cursor and post-cursor taps to use. FFE algorithm then calculates proper values for pre-cursor and post-cursor taps to eliminate ISI.

How do we compute the tap values!?

Algorithms to Identify Tap Values

No hard work required! Keysight ADS has FFE algorithms built-in to compute taps that optimize the eye opening. Nonetheless, "Advanced Signal Integrity For High-Speed Digital Designs” provides a good pencil-and-paper example of FFE Zero-Forcing solution [1].


There are also adaptive equalization techniques that compare the desired equalizer output and the actual equalizer output. Adaptive FFE techniques such as Least-Mean-Square (LMS) and Recursive-Least-Squares (RLS) are available in Keysight ADS.

Fig. 7: Keysight ADS adaptive algorithm setup window.


Shown in Fig. 7 is the adaptive algorithm window where user specifies different parameters for different adaptive algorithms.  


Comparison Between CTLE and FFE

In the time domain, we should expect both techniques to correct for pre-cursor ISI and post-cursor ISI. However, because of the continuous-time, analog nature of CTLE, we expect CTLE to provide only limited improvement in pre-cursor ISI. On the other hand, operating digitally in discrete-time, we expect FFE to reduce ISI in both pre-cursor and post-cursor.

Fig. 8: Equalized single pulse response comparison between CTLE and FFE. Because of its digital nature, FFE corrects ISI beyond the first pre-cursor.  


Shown in Fig. 8 is the single pulse response after CTLE and after FFE. As expected, CTLE barely provides ISI reduction beyond the first pre-cursor. In contrast, FFE can correct more pre-cursor ISI based on the number of the taps specified by the user.


Seen the frequency domain, we expect CTLE to have a high-pass filter characteristic as specified by the zeroes and poles of the filter. In the case of FFE, because of the nature of finite impulse response filter, we expect amplification and attenuation of different harmonics of Nyquist Frequency.   


Fig. 9: Comparison between CTLE and FFE spectrum. As CTLE uses the high-pass filter response to counter the channel low-pass response, FFE amplifies the odd harmonics of the Nyquist frequency to equalize the channel. 


Shown in Fig. 9 is the frequency response of CTLE and FFE. From the comparison, we see as CTLE focuses on boosting frequency content at the Nyquist frequency, FFE algorithm is selecting taps that effectively amplify the odd harmonics to achieve desired equalization result.  


Feed-Forward Equalization Summary

By selecting proper taps, FFE uses delayed pulses to cancel out ISI in the time domain. Viewed in the frequency domain, FFE effectively amplifies the odd harmonics of the Nyquist frequency and reduces ISI. 


So far, both CTLE and FFE are linear equalizers. In the next post, we will cover a non-linear equalization technique: Decision Feedback Equalization (DFE).


Make sure you apply for a free trial and download the attached workspace to apply FFE to your own channel!

That's this week's Tim's Blackboard. Find other cool posts here!


See you next time!



[1]       S. H. Hall, Advanced signal integrity for high-speed digital designs. 2009.

Engineers make simulation reports all the time. However, it is tedious to copy-paste images from ADS to PowerPoint. An easier way to transfer your ADS images to PowerPoint is shown in this short video.


Using the Export_Images add-on, available for download below, ADS users can quickly and easily save images in their schematic, layout, and data display window, and import them into a PowerPoint Presentation. This method is faster, easier, and will provide you with high-quality images for your simulation reports.


Figure 1. The add-on ( can save images from all three window displays above: schematic, layout, and the data display window.


Step 1: Enable the Add-On. Including a custom Add-On is simple and useful in ADS.



Step 2: Initiate the “Export Images” command. From here, ADS downloads all of the images in your workspace at once, so you can save time when making your PowerPoint report.



Step 3: View and place your images. After exporting your images, a folder will appear with all of the images you need to finalize your report.



Step 4: Create your Simulation Report. (And enjoy all the time you saved using the add-on!)


Watch the YouTube video now to get started exporting images for your next simulation report on PowerPoint.


Download the attachment below:

Have you ever found yourself in a situation where the characterization software did not support the hardware you were trying to use?  Your tests may be complex, where the measurement conditions of your next data point depend on previous measurement results.  I have found that using Python integrated with the IC-CAP software leads to a powerful and flexible solution that is supported by an open community. To help with the test development, I have found it useful to create a software layer that handles error checking and low-level function calls. In what follows, I'll describe the use of a "PyVISAWrapper" that can simplify your test suite development.


My Motivation

I found myself in a tricky situation when I started using IC-CAP to characterize and model my memristor devices. I needed to perform a quasi-static measurement to precisely control the ramp rate of the voltage sweep by adding a hold time and source delay time, and to control the delay between measurements. However, in some tests, the measurement conditions for the next measurement in IC-CAP depend on previously measured values. Because of that, IC-CAP’s built-in, general-purpose instrument drivers didn’t support my need to perform a quasi-static measurement.


The solution I found to my dilemma was to write Python code in IC-CAP to control my instruments. The process builds on my previous post, Extending the Power of IC-CAP with Python - PyVISA Instrument Control. Using this process, you too can write Python code to control your instruments and create highly flexible measurement routines.


The PyVISA library turned out to be a great way for me to meet these goals, plus it enables portability across several control interfaces (e.g., GPIB and LAN). And, it was tempting for me to dive right in and start writing instrument specific commands using the default GPIB interface. Instead though, I took a step back and thought about how to make my Python code more general. To that end, I decided to create a wrapper for PyVISA’s low-level library functions that would allow me to send the most common VISA calls to control an instrument (e.g., open(), write(), read(), query(), etc.).


PyVISA Wrapper Utility

You might ask, “Why employ a wrapper utility to use the PyVISA library for instrument control?” It’s a fair question and the answer is pretty straightforward. The wrapper utility may be considered a high-level API for controlling instruments. With carefully constructed API function calls, an engineer can more easily create a suite of tests leveraging smarter I/O function calls, including writing instrument commands, querying responses, checking for command complete events, parsing the measurement data, checking for errors, and providing meaningful troubleshooting information.


What follows are details on how you can use an open source PyVISA wrapper utility I wrote called to simplify writing custom Python code to control almost any instrument. The example code provides the same functionality as the _init_pyvisa macro presented in my last article, but it also adds some useful features described above. The pyvisawrapper API facilitates communication with any instrument that uses TCP/IP or USB, in addition to the standard GPIB. Using the E5270B analyzer as an example instrument, I’ll revisit the _init_pyvisa macro and illustrate the advantages of using the pyvisawrapper functions over low-level function calls.



Since for this process, we’ll leverage the IC-CAP Python library, as well as the PyVISA library, using import statements, it’s important to make sure you have your Python environment configured correctly. Here’s a few of the basic prerequisites:

  1. Install IC-CAP_2016_01 or later, under Windows 7 in the default installation directory, which is typically C:\Keysight\ICCAP_2016_01.
  2. Install the Keysight IO Libraries 17.x software and configure it to use the VISA library visa32.dll. This dynamic link library will be installed in the C:\Windows\system32 directory.
  3. Configure and test communication with your instruments using the Keysight Connection Expert software.
  4. Before attempting this example, install and configure a virtual Python environment and install the PyVISA library presented in my aforementioned article, Extending the Power of IC-CAP with Python - PyVISA Instrument Control. Key to this process is the installation of a standalone Python interpreter, which will be great for developing experimental Python scripts and debugging in programming tools for making future modifications to your custom code, like pyvisawrapper itself, outside of the IC-CAP environment.
  5. Download and copy the script to your user directory. I personally like to create a sub-directory under my account C:/Users/username/iccap/python to store my own custom python code.
  6. Set the ICCAP_USER_PYTHON_PATH environment variable in your Windows 7 advanced systems settings to add this directory to the search path. This will allow IC-CAP to find your Python scripts.
  7. You will need some instruments that can be remotely controlled via GPIB or LAN. Any instrument will do.


Keysight E5270B with ASU



The following is a high-level overview of the code we are going to implement:

  • Test your new virtual Python environment installed as part of the prerequisites.
  • Create a new IC-CAP macro named _pyvisa_run.
  • Activate the virtual Python environment from your script.
  • Import the and modules from the IC-CAP and virtual Python 2.7 environments.
  • Import the to use the high-level API functions in your macro.
  • Use the visaOpenSession() function to access the PyVISA ResourceManager
    and perform the VISA open() on the Keysight E5270B resource via the GPIB interface.
  • Use the visaCloseSession() to close the resource before exiting the script.
  • Use the visaQuery() function to send the *IDN? command to the E5270B and read its response.
  • Use the visaClear() function to perform a GPIB device clear and leave the GPIB interface in a initialized state.



Step-By-Step Process for Using pyvisawrapper


Step 1. Verify your new virtual Python environment

Verify the activated Python 2.7 environment by checking the system path 'sys.path' and system prefix 'sys.prefix.' To do this, open a Windows command shell and perform the following steps:

Activate the (icenv) virtual environment

C:\Users\username> workon icenv

(icenv) C:\Keysight\IC-CAP_2016_01\tools\win32_64>

Change the directory to virtual env (icenv)

C:\Users\username> cdvirtualenv

Check the Python interpreter version for (icenv)

(icenv) C:\Users\username\Envs\icenv> python -V

The version should return:

Python 2.7.3

Start the interactive Python interpreter for the virtual environment.

(icenv) C:\Users\username\Envs\icenv> python

You should see something like the following:

Python 2.7.3 (default, Feb 1 2013, 15:22:31) [MSC v.1700 64 bit (AMD64)] on win32

Type "help", "copyright", "credits" or "license" from more information.


Now, enter the following commands at the Python >>> interactive prompt:

>>> import sys 
>>> print sys.prefix

You should see something like the following:


Now type:

>>> print sys.path

You should see something like the following:


To exit the virtual Python interpreter type:

>>> quit()

(icenv) C:\Users\username\Envs\icenv>

Leave the virtual environment by typing:

(icenv) C:\Users\username\Envs\icenv> deactivate


If you made it this far then your icenv virtual Python environment is setup and ready to be used from IC-CAP.

Step 2. Start IC-CAP, then create a new model file and add a new macro

Go the the main IC-CAP menu and select File, then New. Name your model file ‘pypvisa_example’.


pyvisa example model file


Select the Macros tab and then click New… to create a new macro.


Enter _pyvisa_run for the name of the new macro.


_pyvisa_run python global macro


Step 3. Add variables to the IC-CAP Model Variable table

Select Model Variables and enter the following variables in the Model Variable table:


iccap model variable table

We'll describe each of these variables as follows.

  • The interface  variable should be set to the VISA resource string as listed under the My Instruments panel in Keysight Connection Expert or after performing a scan for instruments. This is also the string returned from PyVISA after sending the list_resources() function to the default resource manager.
  • The visaResponse variable holds the response string from the latest command sent to the instrument.
  • The error_status is a list of values to look for in the status byte register that would indicate an error.  This information should be available in the instrument's programming guide. In the case of the E5270B analyzer, the decimal value for the error status bit is 32. The error status could potentially be returned as 48 if the Set Ready bit is also active, or 128 if an emergency error is reported after the last command sent.
  • The error_command is the list of instrument specific commands necessary for returning the error code and the error message string from the instrument's message buffer. In our E5270B example, the error commands are "ERR?" and "EMG?", with "EMG?" being the command that is sent after processing the list of codes returned from the "ERR?" query. This command will return the error message string for the associated error code passed as a parameter when performing the query.  "ERR?" is the query that works with the B1500A to do extended error reporting. 


The pyvisawrapper code performs all of this detailed error checking for you!  This is incredibly handy.  Simply setting the debug variable to 1 in the Model Variable table will enable debug prints in the macro and pyvisawrapper, and output verbose debug text that is displayed in the IC-CAP Output window. This information will aid you in troubleshooting your Python code.


Step 4. Activate the virtual Python environment

Add the following two lines to your macro

activate_this = "/Users/username/Envs/icenv/Scripts/"
execfile(activate_this, dict(__file__=activate_this))

The "username" in the first line is the name of the current user logged into your Windows 7 machine. This generic name is a place holder for the commands listed below and represent the current user's home directory. 


_pyvisa_run activate virtual python environment


Step 5. Import the functions and

Add the following two lines to your macro

from iccap import icfuncs as f, MVar 
from pyvisawrapper import *

_pyvisa_run macro python imports

Now we have access to all the functions in and


Step 6. Add some local variables and variables that access the Model Variable table

Add the following lines to your macro:

bOk = True                                          # return status of the called function 
cmd = ""                                            # command string
instr = MVar("interface").get_val()                 # visa resource to use from model var table
rsp = MVar("visaResponse")                          # visa response string from read or query
stat = MVar("error_status").get_val().split(",")    # status byte to check for error condition
err = MVar("error_command").get_val().split(",")    # error command to send to query error event
debug = MVar("debug").get_val()                     # enable/disable debug prints            
qdelay = 1.0                                        # delay for visa query

_pyvisa_run macro global variables

Here we are just reading variables from the IC-CAP model variable table and storing them to local Python variables.


Step 7. Use the high-level API function visaOpenSession to access the VISA Resource Manager and open a link to the E5270B resource

Add the following lines to your macro:

# open session and return visa resource link 
vl = visaOpenSession(instr)
if debug: print vl 

# close visa session
bOk = visaCloseSession(vl)
if debug: print "visaCloseSession: ",bOk

You should always close the VISA session when you are done with a resource. Not properly closing the session can cause errors if you attempt to re-open the same resource later.


_pyvisa_run open close session script lines


Execute your macro and you should see something like the following displayed in the IC-CAP Output window:

default source manager: Resource Manager of Visa Library at C:\Windows\system32\visa32.dll 
resources list: (u'ASRL10::INSTR', u'GPIB0::17::INSTR')

pyvisawrapper::visaOpen: True inst: GPIBInstrument at GPIB0::17::INSTR

GPIBInstrument at GPIB0::17::INSTR

pyvisawrapper::closeSession: True

visaCloseSession:  True

You did not need to import to access the VISA resources since handles that for you. It also handles calling the visa.ResourceManager() and using your GPIB0:17::INSTR resource string specified in the Model Variable table.


If this step has errors, then you probably did not install and configure the GPIB VISA driver software application or the instrument is not on the bus. Otherwise the list will not return the GPIB resource with the address of your instrument. The communication drivers installed as part of the prerequisites allow you to 'scan for instruments.' National Instruments provides NI MAX (Measurement & Automation Explorer). Keysight interfaces provide Keysight Connection Expert. These software applications should be installed with your 488.2 and VISA drivers for your communications interface.


Step 8. Send your first command to the instrument to return its identifier string

Add the following lines to your macro:

cmd = "*IDN?" 
if bOk: bOk = visaQuery(vl, cmd, rsp, 10000, stat, err)
print "visaQuery: {} cmd returned {}".format(cmd, rsp.get_val().split(","))

_pyvisa_run ident query script lines

Execute your macro and you should see something like the following displayed in the IC-CAP Output window:

intr: GPIBInstrument at GPIB0::17::INSTR cmd: *IDN? rsp: <iccap.MVar instance at 0x000000000E11B608> 
timo: 10000 stat: 48 err: <iccap.MVar instance at 0x000000000E11B488>

pyvisawrapper::visaQuery() True read: Agilent Technologies,E5270B,0,B.01.10

bytes: 39 

pyvisawrapper::visaQuery: True *IDN? returned ['Agilent Technologies', 'E5270B', '0', 'B.01.10\r\n']

NOTE: The instrument was found on interface GPIB0 at address 17 and returned its identifier string in the visaQuery response.

Step 9. Do some clean up and leave the system in an initialized state

It is good practice to send a GPIB device clear before closing the interface.

To do that, add the following lines to your macro:

bOk = visaClear(vl) 

if debug: print "visaClear: ",bOK


_pyvisa_run visa clear script lines


Step 10. Test the completed _pyisa_run macro

Execute your macro and you should see something like the following displayed in the IC-CAP Output window:

default source manager: Resource Manager of Visa Library at C:\Windows\system32\visa32.dll 
resources list: (u'ASRL10::INSTR', u'GPIB0::17::INSTR')

pyvisawrapper::visaOpen: True inst: GPIBInstrument at GPIB0::17::INSTR

GPIBInstrument at GPIB0::17::INSTR
intr: GPIBInstrument at GPIB0::17::INSTR cmd: *IDN?
rsp: <iccap.MVar instance at 0x000000000C39DF08> timo: 10000 stat: 48 err: ERR?

pyvisawrapper::visaQuery() True read: Agilent Technologies,E5270B,0,B.01.10

bytes: 39 

pyvisawrapper::visaQuery: cmd *IDN? returned ['Agilent Technologies', 'E5270B', '0', 'B.01.10\r\n']

pyvisawrapper::clear: True inst: GPIBInstrument at GPIB0::17::INSTR 

visaClear: True
pyvisawrapper::closeSession: True
visaCloseSession: True

Example of pyvisawrapper's Error Processing

Now, let's look at an example of the error processing, which will help you find errors occurring in your code. Again, this is one of the real advantages of using the pyvisawrapper API. Without it, you would have to write instrument specific code in your Python script to detect, query and display any errors.


Let's purposely create an example of a common type of error such as sending an illegal argument or command to the instrument, and see how it is handled by the pyvisawrapper.  Let's change our macro slightly to send the command "ID?" instead of "*IDN?"


Change the following lines to your macro:

cmd = "ID?" 
if bOk: bOk = visaQuery(vl, cmd, rsp, 10000, stat, err)
print "visaQuery: {} cmd returned {}".format(cmd, rsp.get_val().split(","))

_pyvisa_run error gen script lines

See the error on line 20?

Execute your macro and you should see something like the following displayed in the IC-CAP Output window:

intr: GPIBInstrument at GPIB0::17::INSTR 
cmd: ID?
rsp: <iccap.MVar instance at 0x000000000BFF0348>
timo: 10000
stat: 48
err: ERR?
Query error VI_ERROR_TMO (-1073807339): Timeout expired before operation completed. - last command: ID?
visaQuery: cmd ID? returned ['visaError : 100 : Undefined GPIB command.\r\n']

With no error checking, we would only get the timeout error "VI_ERROR_TMO (-1073807339)".  That doesn't say much, does it?


What's Next?

If you've successfully completed all of these steps, then you should now be able to access the most common functions of PyVISA, the pyvisawrapper API from IC-CAP. And that means you can now very simply create new transforms for instrument control and data acquisition over any supported interface.

In a future article, I’ll outline the steps for using the ideas presented here to create a series of transforms to perform an Id versus Vg quasi-static measurement on a discrete NMOS device. In other forthcoming articles, I'll show you how to use more of the powerful features included in IC-CAP and exposed through the I'll also use the again to write Python code for accessing an instrument and returning measured results. I'll even show you how to access more of the internal IC-CAP functions and data structures, which are provided to enable additional analysis and plotting functions in IC-CAP.

In the meantime, I hope you find this tutorial and the pyvisawrapper utility useful in exploring the various possible ways you can extend IC-CAPs powerful framework to characterize and model your most challenging devices. For more information on IC-CAP or Keysight IO Libraries, go to and



About Python If you are new to Python programming, here’s some information to help you follow the steps in this blog. Python is an "interpreted" language, which means it generally executes commands typed by the user in an interactive command shell. This is convenient for testing program statements to learn the Python syntax. However, a more common means of writing a Python program is to create a Python script file with the '.py' extension. Say you created an example program and save it as '' To run the program, you simply type 'python' at the command shell prompt. Python scripts, which are often called modules, can also be used for creating libraries of functionality, and are distributed along with program resources in packages. Packages can be installed and combined with user-generated code to extend a program's functionality. PIP is the Python package installer that integrates with—the Python Package Index. It is a repository of numerous free Python applications, utilities and libraries. PIP allows you to download and install packages from the package index without manually downloading, extracting and installing the package via the command 'python install'. PIP also checks for package dependencies and automatically downloads and installs those as well. An environment is a folder (directory) that contains everything a Python project (application) needs to run in an organized, isolated manner. When it’s initiated, it automatically comes with its own Python interpreter—a copy of the one used to create it—alongside its very own PIP.




Extending the Power of IC-CAP with Python - PyVISA Instrument Control

Keysight IC-CAP Device Modeling Software

Keysight IO Libraries Suite

The Python Tutorial — Python 2.7.13 documentation

User Guide — virtualenv 15.1.0 documentation

PyVISA: Control your instruments with Python — PyVISA 1.8 documentation

Welcome to Tim’s Blackboard! This is the place to find discussions on interesting topics related to signal integrity and power integrity.


This week on Tim’s Blackboard is “Eye-opening Experience with CTLE,” where we study one of the equalization techniques. This post has an associated ADS workspace. Download it now!


CTLE Opens Closed Eyes

In the previous post, we discussed how frequency-dependent loss of a channel causes the eye to close and concluded with the use of equalization to open the eye.


Fig. 1: A statistical channel simulation in Keysight ADS to demonstrate how CTLE of different DC attenuation opens closed PAM4 eyes.


Today, we will take a close look at Continuous-Time Linear Equalization (CTLE) and how it opens closed eyes for us, see Fig. 1.


Concept of Equalization

As I am writing this section, I ask myself,

“What does equalization imply in a non-technical context?”

And I am pleasantly surprised by Merriam-Webster Dictionary.



Recall that a lossy channel distorts the spectrum of the original single pulse unevenly. Seen in the time domain, the sharp transitions of the pulse spread out at the beginning and the end, as demonstrated in Fig. 2.


Merriam-Webster is right! To equalize is to make the frequency-dependent loss evenly distributed throughout a wide range of frequencies.


Fig. 2: Because the lossy channel attenuates higher frequency components more than lower frequency ones, the sharp transitions at the beginning and the end of the single pulse spread out.


Continuous-Time Linear Equalization Technique

Fig. 3 shows a collection of Continuous-Time Linear Equalization (CTLE) responses for a reference receiver according to IEEE 802.3bs Draft Standard for Ethernet (October 10th 2017).


Fig. 3: A collection of CTLE responses for a reference receiver according to IEEE 802.3bs standard for Ethernet. To illustrate the behavior of the CTLE response, the x-axis of the graph is normalized to the Nyquist frequency.


Plotted against the Nyquist frequency, the curves of CTLE response give us insights on how CTLE evenly distributes the loss. While the CTLE response peaks at frequency close to the Nyquist to preserve content at higher frequencies, there is loss to attenuate spectral content at lower frequencies.


The construction of the CTLE response is that of a peaking filter with three poles and two zeros, defined by




where  is the CTLE gain,  are the CTLE poles,  is the CTLE zero and  are the CTLE low frequency pole and zero. An excel spreadsheet of the reference CTLE coefficients can be downloaded here. The coefficients are taken from Table 120E-2 of the October draft standard.    


On a system level, we are adding an equalizer block after the channel. Applying the multiplication property, in the frequency domain, we can view the channel and equalizer block together as the response of an equalized channel, as demonstrated in Fig. 4.


Fig. 4: Illustration of the combined equalized channel response consisting of channel and equalizer.


Application of CTLE

Fig. 5 shows the insertion loss of a 10-inch stripline channel from Wild River Technology’s ISI-32 platform. We can see the level of insertion loss increases with frequency. In other words, channel loss is unevenly distributed throughout frequencies.


Fig. 5: Left: Wild River Technology's loss characterization ISI-32 platform. Right: the insertion loss of a 10-inch stripline channel from the platform.


Because the goal of equalization is to provide a more evenly distributed loss through a wider bandwidth than the original channel, we would expect the equalizer to improve the unevenness of the original channel.


Shown on the left of Fig. 6 is a comparison between the 10-inch stripline channel and the CTLE response. As channel loss drops with frequency, CTLE provides a peak to counteract the effect.


Fig. 6: Left: channel response and CTLE response comparison. As the S21 of the channel drops, CTLE picks up to even out the increasing loss. Right: comparison between the original channel and equalized channel. The equalized channel has a more even frequency response throughout the frequencies below Nyquist.


Shown on the right of Fig. 6 is the equalized channel. The CTLE has successfully created more even loss curve than the original.     

But how do I know for sure the loss of the equalized channel is really more even for wider bandwidth than the original?

To compare the responses of the channel before and after equalization on an equal footing, we normalize the equalized channel response to have 0 dB of loss at low frequency. Fig. 7 is the result of the two curves. Allowing the two responses to have identical loss at low frequency, we observe that, indeed, the equalized channel provides a more even frequency response for a wider frequency range.   


Fig. 7: Comparison between original channel and the equalized channel response (normalized). The comparison demonstrates that the equalized channel provides a more even frequency response up to close to Nyquist.  


Single Pulse Response with CTLE

Since CTLE improves the evenness of the frequency response, we should consequently expect the single pulse response in time domain to improve as well. In particular, we expect a restoration of the transitioning edges which was distorted by the original high frequency loss. After equalization, the spread of the single pulse should be reduced. 


Fig. 8: After equalization, the single pulse spectrum is restored and results in the reduction of spread of the single pulse in the time domain.


Fig. 8 shows simulation results consistent with our expectation. As we apply more and more DC attenuation to restore the spectrum, the spread of the single pulse keeps decreasing.


However, to my surprise, the maximum eye opening does not happen at maximum DC attenuation at 9 dB.


From the animation above, one observes both the reduction of the spread and reduction of amplitude. Until 6.5 dB of CTLE DC attenuation, the spread of the single pulse is positive and reaches almost zero at 6.5 dB. As the DC attenuation increases to more than 6.5 dB, the single pulse spectrum is restored too much, resulting in a negative dip at the end of the pulse.      


Achieve Maximum Eye-opening 

Because the single pulse response is a special case of an eye diagram, we would also expect the eye to exhibit the same behavior. The eye opening should reach a maximum at around 6.5 dB of DC attenuation.


Fig. 9: ADS statistical channel simulation of an eye to show the eye opening with different CTLE configurations.


In Fig. 9, one can somewhat make out the increase of eye opening as the eye amplitude decreases. To identify the precise eye width and height, we plot the width and height measurements against the CTLE configurations, see Fig. 10.


Fig. 10: Eye width and eye height for different CTLE configuration. As expected, the maximum of eye width and eye height occurs at 6.5 dB of DC attenuation.


As expected, at 6.5 dB of CTLE DC attenuation, both eye height and eye width are at the maximum. However, this might not be always the case. Every channel is a little different, and every eye is a little different. Therefore, it is important and necessary to perform analyses in both frequency and time domain, view the single pulse response and review eye diagrams.


More Equalization Techniques

Although the IEEE reference CTLE curves are all passive and have maximum 0 dB gain, depending on the need, CTLE implementations can also be active and have positive gain. As the name “continuous-time” suggests, one implements CTLE with analog components. Nonetheless, equalization can also be done in discrete-time with digital signal processing.


In the next two posts, we will discuss equalization in the discrete-time such as Feed Forward Equalization and Decision Feedback Equalization. Make sure you apply for a free trial and download the attached workspace to apply IEEE reference CTLE's to your own channel!


That's this week's Tim's Blackboard. See you next time!

Welcome to Tim’s Blackboard! This is the place to find discussions on interesting topics related to signal integrity and power integrity.


This week on Tim’s Blackboard is “Root Cause of Eye Closure,” where we study one of the root causes of eye closure.

After reading the post, download the attached ADS workspace to experiment with Fourier Transform and channel simulator!



Even when you do everything right, i.e., using controlled impedance lines and termination strategy, loss remains a problem when traces are long and when transmitting in the Gigabit regime.


Specifically, it is the frequency-dependent loss that significantly degrades the signal quality at the receiver. Fig. 1 demonstrates the resulting eye diagrams of frequency-dependent loss and constant loss with the same loss at Nyquist frequency.

Fig. 1: ADS simulation of two different channels with the same loss at Nyquist frequency. The eye closure of the channel with frequency-dependent loss is more prominent than the channel with constant loss (Eye Diagrams are offset to illustrate the eye closure).


Given the same transmitter, receiver and same loss at the Nyquist frequency, the channel with frequency-dependent loss introduces more Inter-Symbol Interference (ISI) and degrades the eye horizontally more than the channel with constant loss.

But how?

In this post, we will transmit a single pulse and use our knowledge of time domain and frequency domain transformation to learn the impact of frequency-dependent loss.


Single Pulse in Frequency Domain

To view the pulse in frequency domain, we perform Fourier Transform to decompose the input signal, channel, and output signal into their corresponding frequency spectrum. Fig. 2 shows the mathematical relationship of the input, the channel, and the output.


Fig. 2: Illustration of performing Fourier Transform on the time domain input-channel-output relationship.  


After the transformation, the time domain convolution corresponds to multiplication in the frequency domain. The output spectrum is the product of the input spectrum and the channel frequency response after multiplication.


Fig. 3 demonstrates a single pulse going through a channel in both time and frequency domain. Since the frequency domain and time domain are two sides of the same coin, if we have the frequency spectrum of a time domain signal, we could apply Inverse Fourier Transform on the spectrum to retrieve the time domain representation.


Fig. 3: Sending a single pulse through a channel.


We see difference in the shapes of the input and output single pulse spectrum in Fig. 3, and we know the channel ought to change the input spectrum, but

How does the channel frequency response cause the spread of the output time domain waveform?    

To answer the question, let’s take a closer look at the time and frequency domain relationship.


Reconstruction of Waveform from Spectrum

Frequency domain representation shows how different frequency components interact with each other to create the time domain waveform. The constructive and destructive interference of sine waves of different frequencies works together to form the time domain waveform.


Thus, the shape of the frequency spectrum is important when one wants to reconstruct and maintain the shape of the original time domain waveform. For example, if we were to divide the the amplitude of the entire spectrum by two, we should expect the resulting time domain waveform to still be a single pulse, but with half of the original amplitude.

Fig. 4: Time domain and frequency domain representation of the original and modified waveforms in ADS. Because different frequency components work together to produce the shape of the original pulse, if the relative strengths of all components are identical, the shape of the time domain waveform is the same


Fig. 4 shows a modified spectrum of the same shape and the result of Inverse Fourier Transform. As we expect, because the same modification, dividing by two, is done to the entire spectrum, the relationship between different frequencies is the same. Consequently, the shape of the single pulse waveform is maintained in the time domain, and the peak amplitude is indeed half of the original.


However, if we don’t treat the spectrum as a whole, and we alter only a small part of the spectrum, we expect to see a small change in the spectrum to produce a dramatic change in the shape of single pulse waveform, as shown in Fig. 5.


Fig. 5: Although the spectrum is modified a little bit, the relative strengths of different components are different. The new shape of the spectrum no longer corresponds to the original single pulse.


Although Fig. 5 is an extreme case where a small part of spectrum is removed, it underscores the importance of treating a given spectrum in its entirety to maintain the corresponding time domain waveform.


To see how the single pulse would look after going through the channel, let’s take a look at how the channel treats different frequency components.  


Channel Frequency Response Changes Spectrum

We can see from Fig. 6 the frequency response of the channel modifies the spectrum differently at different frequencies. Therefore, we expect the shape of the reconstructed pulse to be different from the original.

Fig. 6: Channel frequency response shows more attenuation at higher frequencies than lower frequencies.


Specifically, because the channel attenuates higher frequency components that make up the sharp transition more than the lower frequency ones, at the output of the channel, the rising and falling transitions of the pulse will spread. 


A comparison of lossy channel and lossless channel in Fig. 7 shows consistent result with our expectation. The lossy channel distorts the spectrum of the original input pulse unevenly. Seen in the time domain, the sharp transitions of the original pulse spread out at the beginning and the end.


Fig. 7: Because the lossy channel attenuates higher frequency components more than lower frequency ones, the sharp transitions at the beginning and the end of the single pulse spread out.


The spreading of the single pulse is known as the inter-symbol interference (ISI) because the current pulse interferes with the one pulse before and the one after. To reduce ISI is to reduce eye closure.      


How to Avoid Eye Closure

Because of frequency-dependent loss closes the eye, to open the eye, we do the following:

  1. Reduce the amount of loss,
  2. Remove the frequency dependence of the loss.


Given a fixed data rate, to reduce the amount of loss, we can:

  • Keep trace as short as possible,
  •  Use substrate with lower Dk and Df,
  • Use smoother conductor and as low resistance as budget allows.


To remove frequency dependence of the loss, we can equalize the spectrum with different equalization techniques:

  • CTLE: Continuous Time Linear Equalizer,
  • FFE: Feed-Forward Equalizer,
  • DFE: Decision Feedback Equalizer.


Fig. 8 shows an example of applying equalization to open an eye.


Fig. 8: Equalization result of ADS channel simulation (Eye diagrams are offset to illustrate the opening).


The next blog talks more about the different equalization techniques and how to perform them in ADS.

Make sure you apply for a free trial and download the attached workspace to experiment with Fourier Transform and channel simulator!


That's this week's Tim's Blackboard. See you next time!

Signal and Power Integrity engineers look to ADS for the correct treatment of high-speed effects like distortion, mismatch, and cross-talk. Building on the strong foundation and loyal users ADS has amassed through the years, ADS 2017 delivers new options and functionality that enable it to be the tool today's designers need to get ahead.


The latest release of ADS is a stronger, faster, and more comprehensive platform for signal and power integrity analysis. Read about the top 10 new features in ADS 2017 for Signal and Power Integrity Engineers or watch the video.


10. Improved substrate editor

The new and improved substrate editor has an efficient edit feature for a larger number of layers. The simplified editor interface reduces simulation setup time and increases productivity.

ads2017 substrate editor

9. Fast Wire labeling

Labeling ports with the correct node names is time consuming, especially when you have many ports. With the new CSV import labeling, naming more than 10 ports is simple. 

ads2017 fast wire labeling


8. Parallel Sweep on windows

In ADS 2017, Batch simulation is able to run in Turbo mode in both Linux and windows. Using the 8-pack Element license and simulation manager, you can unleash the parallel computing power of your workstation PC. Reduce simulation time of large sweeps with simulation manager.

ads2017 parallel sweep


7. Statistical mode PAM -4

To simulate a PAM-4 signal down to 10 ^ -16 BER, a bit-by-bit simulation would take hours. ADS 2017 now supports PAM-4 in statistical mode. You can directly simulate PAM-4 to very low BER in a matter of seconds to minutes.


6. Mixed-mode S-parameter Checker

In the improved S-parameter checker, you can now convert single-ended S-parameters to mixed-mode in a few clicks. Save time and increase your productivity by letting the S-parameter checker show you the mixed-mode response.

ads2017 mixed mode s-param checker


5. S-parameter Spectral Thresholding

Usually, you would expect simulation speed to decrease with higher port count. In ADS 2017, the spectral thresholding algorithm removes weakly coupled ports before simulation. The result is faster simulation speed for a higher port count, without sacrificing accuracy.

ads2017 faster simulation


4. New and improved IBIS Components

Are you looking for specific pins in your IBIS model to interact with? The improved IBIS component interface helps you quickly sort and select desired pins. With built-in smart default settings, the IBIS schematic is cleaner, and setup time is faster.
ibis components


3. 3D Via Designer: Enabling Access to Accurate Via Models

A crucial problem when simulating high-speed signal interconnects is a lack of access to via models that are accurate at high frequencies. To solve this problem, ADS 2017 introduces Via Designer, a tool for creating and modeling PCB vias (single-ended or differential), while giving you full control over the via specifics.
ads2017 3d via designer


2. PIPro Bill of Materials Optimization for Decaps

Decap Optimization in PIPro can take all the decaps as laid out on the board, and search for the optimal solution that meets the desired target impedance profile. The user can define an optimal solution, by specifying weighted criteria such as: number of decaps, unique models, vendors, or cost. PIPro's algorithm intelligently ranks your best candidate solutions so you arrive at the best trade-off between performance and cost.

decap output


1. PIPro DC Electro-Thermal Capability

To find the true IR-drop of your power distribution network, thermal effects need to be considered in your analysis. PIPro performs an automated, iterative electric and thermal solve on each PDN, providing thermal insights to every power integrity engineer. PIPro calculates the temperature distribution of the board, so you can ensure the temperatures of vias, traces, and devices in your design are within the specification.  

ads2017 electro-thermal



These 10 new features are just the beginning of all the new capabilities and usability enhancements in the latest release of Advanced Design System (ADS) 2017. Along with improvements for the Signal and Power Integrity Designers are improvements for RF/MW designers doing RF front-end module and Silicon RFIC design. Check out all the new features on the web page and apply for your free trial of ADS 2017 today.

free trial of ADS 2017

FREE Evaluation of ADS | Keysight EEsof EDA  

Many of you know Matt Ozalas, RF Design Engineer at Keysight Technologies, and his infamous YouTube video series, How to Design an RF Power Amplifier. I got a chance to talk to him about what he’s most excited about in the latest ADS release.

Matt Ozalas, RF Design Engineer at Keysight Technologies


Kaelly: I heard ADS 2017 is being called the “3D release”. What 3D capabilities are you excited for?


Matt: It’s 2017, we’ve got hoverboards and self-driving cars -- we should be designing in 3D by now, right?  Besides the “wow” factor, some tasks are really useful to do in 3D.  I think a lot of designers will feel the same way after trying the new capabilities in ADS 2017 out.  In ADS 2017, those 3D capabilities span design, simulation, and visualization.   So, physical design becomes more realistic early on, the simulation is easier to set up, the results are more accurate, and the analysis becomes more meaningful. 

 3D layout, ADS 2017

In ADS 2017, you can design a layout in three dimensions. You can route a trace or stitch a VIA more precisely in a dense module or chip, and you can select complex structures much more easily in 3D.  This might seem trivial but we’ve all been in that spot where a VIA gets missed or the routing goes to the wrong layer and that causes big problems down the line. Designing in 3D prevents these mistakes from the outset.  The 3D selection also helps if you’re trying to do an EM simulation, getting all the right structures selected is not always easy.  You can even thermally simulate multiple technologies at the same time, like a chip stacked on a substrate.  Let’s face it, no one can afford to overlook these things in the design process anymore, mistakes cost too much and reliability problems are too critical to leave to chance.  Just ask those people making hoverboards.

 RFIC layout, ADS 2017

Kaelly: Designers are always looking for ways to save time. Is ADS 2017 faster than its previous release?


Matt: Yes, let’s look at EM simulation for example.  The Momentum 3D planar EM simulator now uses multi-threading for substrate calculations in ADS 2017.  What does that mean?  Well, typically substrate calculations only use one processor, but for example, your Windows machine probably has four processors.   In ADS 2017, Momentum farms those calculations out to the different processors and so on that Windows machine, you will see a 4x speed improvement in the substrate calculation.   By the way, in Momentum, the substrate calculation is usually the most time-consuming piece.  Now, what about 3D Finite Element Method (FEM) Simulation?  Well, in ADS 2017, this 3D engine has a turbo mode which distributes the simulation frequencies to different processors, and that of course, speeds up the simulation time dramatically.   

 FEM in ADS 2017, finite element method

Kaelly: I know there are many usability improvements in ADS 2017. Which ones are most exciting to you?


Matt: The way I look at it, no matter how good a capability is, if it isn’t easy to use, I probably won’t use it.  So 3DEM simulation is faster, right?  Great, but what about getting your design into that EM engine?  If that takes too long, all the speed improvement is less meaningful.   In ADS 2017, we looked closely at the EM setup process, like what steps designers take before they run an EM simulation.  They set up a substrate, then perhaps if they want to analyze a sub design, they’ll cut that part out, remove unwanted metal, add ports, go play around with some EM settings, and finally click run.   A lot of steps. 

3D EM in ADS 2017


In ADS 2017, you will find that every one of those steps is easier.  The substrate editor has a table definition feature which enables you to easily create and modify highly complicated substrates with lots of layers.  A grouping capability allows you to much more easily group items you want to be modeled. There are even features that allow you to more easily place multiple ports and pins, and assemble and define ports. Separately, these features might not seem all that exciting, but put them together and the result is undeniable: fast and simple EM simulation setup.


Anyone who has ever used the ADS Electro-Thermal simulator knows that defining a substrate involves a text-based file, but not anymore. With ADS 2017, you can accomplish that task using the substrate editor. Just imagine how much easier it will be to visualize your thermal stackup using the substrate editor, rather than writing it into a cryptic text file.


Another great new feature in ADS 2017 is its multi-technology support (e.g., Chip on Package). In the past, if you had a chip that went into a board or module, you then had to simulate those two technologies. You could do it, for sure, with the ADS Electro-Thermal simulator, but it required a 3-page procedure and was impossibly difficult. With ADS 2017, that simulation of multiple technologies just works.


Kaelly: What’s the ADS Python Data Link that I keep hearing about?


Matt: I have been using this capability for all kinds of neat things. This is what I’m most excited about in ADS 2017. In essence, you can take your ADS simulation result and run it through a Python script by just using an equation in data display. The ADS data goes into Python, the script gets run, and the results come back to ADS in one step.  It’s like hooking a rocket engine onto ADS Data Display – and the best part is you never have to leave the simulation environment.  The possibilities are endless: 3D plotting, instrument connectivity, loadpull contours from measured data, all that stuff becomes easy to do, and you don’t even need to know Python to take advantage of it because the scripts already exist and they just run in the background.  The best application I’ve seen of this feature so far is plotting ADS simulation data on a cylindrical 3D Smith Chart, called the “Smith Tube”.  Look up the Smith Tube on IEEE Explore, it is so cool.  It will change the way you think about circuit design – seriously!

 ADS 2017 Data Link with Python

Kaelly: Thanks Matt! I’ll have to check that out.


If you want specific information on any of the features Matt mentions, and some that he didn’t, check out the ADS 2017 release webpage.


free trial of ADS 2017

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