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Tim Wang Lee
Click to view contentWelcome to Tim’s Blackboard! This is the place to find discussions on interesting topics related to signal integrity and power integrity.   This week on Tim’s Blackboard is “Eye-opening Experience with CTLE,” where we study one of the equalization techniques. This post has an associated ADS workspace. Download it now!   CTLE Opens Closed EyesIn… (Show more)
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michea
Click to view contentSince its introduction in 2015, WaferPro Express (WPE) has become the workhorse test executive for wafer level measurements and device characterization, combining the instrument automation of IC-CAP with wafer mapping and prober control. The software ships with numerous instrument drivers and routines that may be leveraged for all the most common…
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Colin Warwick
Click to view contentThe Tower of Babel (Genesis 11:1-9) is a story to explain why the world's peoples speak different languages:     https://en.wikipedia.org/wiki/Tower_of_Babel   The explanation of why the world's circuit simulators speak different languages is more mundane...   There were many attempts at circuit simulation programs before, but one called… (Show more)
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Colin Warwick
Click to view contentWant to find out how to design a smaller, lighter, and lower cost switched-mode power supply? Please register for our Keysight Engineering Education (KEE) Webinar on this topic, that we will present on Wednesday January 30th 2019, 10AM Pacific/1PM Eastern.   Bring your questions to our live Q&A session!   Registration link:… (Show more)
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Colin Warwick
Click to view contentWhen you create a Verilog-A version of a VHDL analog model, you'll want to verify that the two match. A convenient way to do this is to compare things like I-V curves, for example. The ADS simulator can place data for the I-V curve of your Verilog-A model directly into the dataset used by ADS Data Display. But how do you get the VHDL version in?… (Show more)
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